------------------------------------------------------------------------------- -- Title : MachXO2 Serial Configuration -- Project : tiny-xo2 ------------------------------------------------------------------------------- -- File : top.vhd -- Author : マリオ -- Company : -- Created : 2017-11-21 -- Last update: 2017-11-21 -- Platform : -- Standard : VHDL'93/02 ------------------------------------------------------------------------------- -- Description: ------------------------------------------------------------------------------- -- Copyright (c) 2017 GPLv2 ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity config_top is generic ( BAUD_RATE : integer := 9600); port ( clk : in std_logic; -- input clock 12 MHz dts : in std_logic; -- DTS Strobe signal uart_tx : out std_logic; -- UART TX uart_rx : in std_logic); -- UART RX end entity config_top; architecture RTL of config_top is begin -- architecture RTL end architecture RTL;