diff --git a/.library_mapping.xml b/.library_mapping.xml
index 226c5d4..cbf1360 100644
--- a/.library_mapping.xml
+++ b/.library_mapping.xml
@@ -4,7 +4,6 @@
   <Mappings Location="src" Library="design"/>
   <Mappings Location="Common Libraries/IEEE" Library="ieee"/>
   <Mappings Location="Common Libraries" Library="not mapped"/>
-  <Mappings Location="quartus" Library="not mapped"/>
   <Mappings Location="Common Libraries/STD" Library="std"/>
   <Mappings Location="" Library="work"/>
 </com.sigasi.hdt.shared.librarymapping.model:LibraryMappings>
diff --git a/.project b/.project
index 85fd938..cbd896b 100644
--- a/.project
+++ b/.project
@@ -29,17 +29,17 @@
 		<link>
 			<name>Common Libraries/IEEE</name>
 			<type>2</type>
-			<locationURI>sigasiresource:/vhdl/93/IEEE</locationURI>
+			<locationURI>sigasiresource:/vhdl/2008/IEEE</locationURI>
 		</link>
 		<link>
 			<name>Common Libraries/STD</name>
 			<type>2</type>
-			<locationURI>sigasiresource:/vhdl/93/STD</locationURI>
+			<locationURI>sigasiresource:/vhdl/2008/STD</locationURI>
 		</link>
 		<link>
 			<name>Common Libraries/IEEE/Synopsys</name>
 			<type>2</type>
-			<locationURI>sigasiresource:/vhdl/93/IEEE%20Synopsys</locationURI>
+			<locationURI>sigasiresource:/vhdl/2008/IEEE%20Synopsys</locationURI>
 		</link>
 	</linkedResources>
 </projectDescription>
diff --git a/src/ws2812b-phy/ws2812bphy.vhd b/src/ws2812b-phy/ws2812bphy.vhd
index f38455e..c35065e 100644
--- a/src/ws2812b-phy/ws2812bphy.vhd
+++ b/src/ws2812b-phy/ws2812bphy.vhd
@@ -57,14 +57,14 @@ begin
 					case bitstate is
 						when HIGH =>
 							if color_vector(bitnum) = '1' then
-								if counter < HIGH1 then
+								if counter < HIGH1 - 1 then
 									counter := counter + 1;
 								else
 									bitstate <= LOW;
 									counter  := 0;
 								end if;
 							else
-								if counter < HIGH0 then
+								if counter < HIGH0 -1 then
 									counter := counter + 1;
 								else
 									bitstate <= LOW;
@@ -73,7 +73,7 @@ begin
 							end if;
 						when LOW =>
 							if color_vector(bitnum) = '1' then
-								if counter < LOW1 then
+								if counter < LOW1 -1 then
 									counter := counter + 1;
 								else
 									bitstate <= HIGH;
@@ -87,7 +87,7 @@ begin
 									end if;
 								end if;
 							else
-								if counter < LOW0 then
+								if counter < LOW0 - 1 then
 									counter := counter + 1;
 								else
 									bitstate <= HIGH;
diff --git a/src/ws2812test.vhd b/src/ws2812test.vhd
index a78b663..c155515 100644
--- a/src/ws2812test.vhd
+++ b/src/ws2812test.vhd
@@ -13,7 +13,13 @@ end entity ws2812test;
 
 architecture RTL of ws2812test is
 	constant LEDCNT_c : integer := 60;
-	constant HEARTBEATMAX_c : integer := 700000;
+	constant HEARTBEATMAX_c : integer := 700000
+-- pragma synthesis_off
+--pragma synthesis_off
+/ 10
+-- pragma synthesis_on
+--pragma synthesis_on
+	;
 	signal rst         : std_logic;
 	signal ws_busy     : std_logic;
 	signal ws_strb     : std_logic;
diff --git a/ws2812test_bench.gtkw b/ws2812test_bench.gtkw
new file mode 100644
index 0000000..8c3bfb9
--- /dev/null
+++ b/ws2812test_bench.gtkw
@@ -0,0 +1,68 @@
+[*]
+[*] GTKWave Analyzer v3.3.76 (w)1999-2016 BSI
+[*] Tue Oct 25 08:40:37 2016
+[*]
+[dumpfile] "/tmp/SigasiCompileCache7873927896615767096/ws2812b/mentor/ws2812test_bench.ghw"
+[dumpfile_mtime] "Tue Oct 25 08:31:59 2016"
+[dumpfile_size] 70605236
+[savefile] "/home/mari/projects/fpga/sigasi/workspace/ws2812b/ws2812test_bench.gtkw"
+[timestart] 0
+[size] 2880 1508
+[pos] -1 -1
+*-42.233265 116120000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[treeopen] top.
+[treeopen] top.ws2812test_bench.
+[treeopen] top.ws2812test_bench.ws2812test_inst.
+[treeopen] top.ws2812test_bench.ws2812test_inst.color_active.
+[treeopen] top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.
+[sst_width] 287
+[signals_width] 238
+[sst_expanded] 1
+[sst_vpaned_height] 445
+@28
+top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.bitstate
+top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.ws_output_state
+top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.strb
+top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.ws_out
+top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.busy
+top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.rst
+top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.clk
+@8022
+#{top.ws2812test_bench.ws2812test_inst.color_active.blue[7:0]} top.ws2812test_bench.ws2812test_inst.color_active.blue[7] top.ws2812test_bench.ws2812test_inst.color_active.blue[6] top.ws2812test_bench.ws2812test_inst.color_active.blue[5] top.ws2812test_bench.ws2812test_inst.color_active.blue[4] top.ws2812test_bench.ws2812test_inst.color_active.blue[3] top.ws2812test_bench.ws2812test_inst.color_active.blue[2] top.ws2812test_bench.ws2812test_inst.color_active.blue[1] top.ws2812test_bench.ws2812test_inst.color_active.blue[0]
+@20000
+-
+-
+-
+@8022
+#{top.ws2812test_bench.ws2812test_inst.color_active.green[7:0]} top.ws2812test_bench.ws2812test_inst.color_active.green[7] top.ws2812test_bench.ws2812test_inst.color_active.green[6] top.ws2812test_bench.ws2812test_inst.color_active.green[5] top.ws2812test_bench.ws2812test_inst.color_active.green[4] top.ws2812test_bench.ws2812test_inst.color_active.green[3] top.ws2812test_bench.ws2812test_inst.color_active.green[2] top.ws2812test_bench.ws2812test_inst.color_active.green[1] top.ws2812test_bench.ws2812test_inst.color_active.green[0]
+@20000
+-
+-
+-
+@8022
+#{top.ws2812test_bench.ws2812test_inst.color_active.red[7:0]} top.ws2812test_bench.ws2812test_inst.color_active.red[7] top.ws2812test_bench.ws2812test_inst.color_active.red[6] top.ws2812test_bench.ws2812test_inst.color_active.red[5] top.ws2812test_bench.ws2812test_inst.color_active.red[4] top.ws2812test_bench.ws2812test_inst.color_active.red[3] top.ws2812test_bench.ws2812test_inst.color_active.red[2] top.ws2812test_bench.ws2812test_inst.color_active.red[1] top.ws2812test_bench.ws2812test_inst.color_active.red[0]
+@20000
+-
+-
+-
+@8022
+#{top.ws2812test_bench.ws2812test_inst.blue_gamma[7:0]} top.ws2812test_bench.ws2812test_inst.blue_gamma[7] top.ws2812test_bench.ws2812test_inst.blue_gamma[6] top.ws2812test_bench.ws2812test_inst.blue_gamma[5] top.ws2812test_bench.ws2812test_inst.blue_gamma[4] top.ws2812test_bench.ws2812test_inst.blue_gamma[3] top.ws2812test_bench.ws2812test_inst.blue_gamma[2] top.ws2812test_bench.ws2812test_inst.blue_gamma[1] top.ws2812test_bench.ws2812test_inst.blue_gamma[0]
+@20000
+-
+-
+-
+@8022
+#{top.ws2812test_bench.ws2812test_inst.green_gamma[7:0]} top.ws2812test_bench.ws2812test_inst.green_gamma[7] top.ws2812test_bench.ws2812test_inst.green_gamma[6] top.ws2812test_bench.ws2812test_inst.green_gamma[5] top.ws2812test_bench.ws2812test_inst.green_gamma[4] top.ws2812test_bench.ws2812test_inst.green_gamma[3] top.ws2812test_bench.ws2812test_inst.green_gamma[2] top.ws2812test_bench.ws2812test_inst.green_gamma[1] top.ws2812test_bench.ws2812test_inst.green_gamma[0]
+@20000
+-
+-
+-
+@8022
+#{top.ws2812test_bench.ws2812test_inst.red_gamma[7:0]} top.ws2812test_bench.ws2812test_inst.red_gamma[7] top.ws2812test_bench.ws2812test_inst.red_gamma[6] top.ws2812test_bench.ws2812test_inst.red_gamma[5] top.ws2812test_bench.ws2812test_inst.red_gamma[4] top.ws2812test_bench.ws2812test_inst.red_gamma[3] top.ws2812test_bench.ws2812test_inst.red_gamma[2] top.ws2812test_bench.ws2812test_inst.red_gamma[1] top.ws2812test_bench.ws2812test_inst.red_gamma[0]
+@20001
+-
+@20000
+-
+-
+[pattern_trace] 1
+[pattern_trace] 0