Device Tree Overview
This page explains how to use the M_CAN device driver in the newest version (v2.0 or greater).
A basic example on the device tree of the M_CAN can be found in the README.md and is shown below:
/* M_CAN Device Tree Nodes */
/* Example clocks */
hclk: hclk {
compatible = "fixed-clock";
#clock-cells = < 0 >;
clock-frequency = <50000000>;
};
cclk: cclk {
compatible = "fixed-clock";
#clock-cells = < 0 >;
clock-frequency = <40000000>;
};
/* M_CAN device */
mcan0: can@0xff240000 {
compatible = "bosch,m_can";
reg = <0xff240000 0x200>,<0xff260000 0x4000>;
reg-names = "m_can", "message_ram";
interrupt-parent = <&intc>;
interrupts = <0x0 40 0x4>;
interrupt-names = "int0";
clocks = <&hclk>, <&cclk>;
clock-names = "hclk", "cclk";
bosch,mram-cfg = <0x0 128 64 64 32 64 32 32>;
};
'reg' Values
The M_CAN device node consists of two memory regions. The first is the register address space of the M_CAN. The M_CAN uses a 9 bit address space. Therefore it is 0x200 long.
The second memory region is the whole message RAM. this RAM can be shared betwen different M_CAN nodes. In this example it has a length of 0x4000 bytes.
Interrupts
It is necessary to configure interrupt line 0 of the M_CAN according to your SoC. Although interrupt line 1 is specified in some device trees, it will not be used by the driver.
Clocks
The M_CAN needs two clocks. The first clock hclk is used for the internal bus interface. The second clock cclk is used for the CAN communication. Its value should be one of three clock speeds. These speeds are optimezed to generate common CAN bit rates including CAN FD.
cclk = {20 MHz, 40 MHz, 80 MHz}
It is important, due to internal clock crossings, that hclk is always higher than or equal to cclk.
MRAM Config
The last device tree value configures the setup and layout of the MRAM (message RAM).
It is an array consisting of eight values:
bosch,mram-cfg = <offset, 11 bit filter, 29 bit filter, RX FIFO 0, RX FIFO 1, RX Buffers, TX event FIFO, TX Buffers (v3.0.x) / TX FIFO Elements (>=v3.1.x)>;
The offset value defines the address offset in bytes inside the MRAM region. Ensure that the memory regions of different M_CANs with the same MRAM do not overlap each other.
The remaining values configure the amout of elments for different FIFOs and Buffers.
For M_CAN Version 3.0.x
For M_CAN versions 3.0.x, the driver only uses the RX FIFO 0 and one(!) TX Buffer.
Following line
bosch,mram-cfg = <0x0, 0, 0, 32, 0, 0, 0, 1>;
is a valid configuration with 32 RX FIFO elements. The other values cna be set to numbers greater than zero according to the user manual. The space will be reserved in the message RAM will not be used by the driver.
Also it is possible to configure more than one TX Buffer. However, only one will be used.
For M_CAN Version >=3.1.x
For versions greater than 3.1.x, the driver uses the TX FIFO to improve performance. For correct operation it also needs th TX Event FIFO. Therefore the TX Event FIFO value has to be configured. To prevent overflows it is recommended to use at least as many TX Event FIFO elements as TX FIFO Elements.
Following line
bosch,mram-cfg = <0x0, 0, 0, 32, 0, 0, 10, 10>;
is a valid configuration. The M_CAN will use 32 RX FIFO elements in RX FIFO 0 and 10 TX FIFO Elements. To detect the sent messages a TX Event FIFO size of 10 is also configured.
Filters and RX FIFO 1/ RX Buffers are not used in this configuration as well.