From e0ffd895ee49eb70eb0b85710c1754c2eb1e0fc6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mario=20H=C3=BCttel?= Date: Wed, 26 Apr 2017 14:17:14 +0200 Subject: [PATCH] Update page 'M_CAN Driver Usage Device Tree' --- M_CAN Driver Usage Device Tree.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/M_CAN Driver Usage Device Tree.md b/M_CAN Driver Usage Device Tree.md index 88f2afe..87e40c0 100644 --- a/M_CAN Driver Usage Device Tree.md +++ b/M_CAN Driver Usage Device Tree.md @@ -44,9 +44,9 @@ It is necessary to configure interrupt line 0 of the M_CAN according to your SoC The M_CAN needs two clocks. The first clock *hclk* is used for the internal bus interface. Thesecond clock *cclk* is used for the CAN communication. It should be one of the following values: -clk = {20 MHz, 40 MHz, 80 MHz} +cclk = {20 MHz, 40 MHz, 80 MHz} -It is important, due to internal clock crossings, that *hclk* is always higher or equal to *cclk*. +It is important, due to internal clock crossings, that *hclk* is always higher than or equal to *cclk*. ### MRAM Config