Finalize layout for v2 PCB
This commit is contained in:
		
										
											
												File diff suppressed because it is too large
												Load Diff
											
										
									
								
							@@ -1,4 +1,4 @@
 | 
				
			|||||||
update=Sat 27 Mar 2021 07:10:46 PM CET
 | 
					update=Sun 28 Mar 2021 03:32:14 PM CEST
 | 
				
			||||||
version=1
 | 
					version=1
 | 
				
			||||||
last_client=kicad
 | 
					last_client=kicad
 | 
				
			||||||
[general]
 | 
					[general]
 | 
				
			||||||
@@ -22,8 +22,8 @@ AllowMicroVias=0
 | 
				
			|||||||
AllowBlindVias=0
 | 
					AllowBlindVias=0
 | 
				
			||||||
RequireCourtyardDefinitions=0
 | 
					RequireCourtyardDefinitions=0
 | 
				
			||||||
ProhibitOverlappingCourtyards=1
 | 
					ProhibitOverlappingCourtyards=1
 | 
				
			||||||
MinTrackWidth=0.2
 | 
					MinTrackWidth=0.25
 | 
				
			||||||
MinViaDiameter=0.4
 | 
					MinViaDiameter=0.5
 | 
				
			||||||
MinViaDrill=0.3
 | 
					MinViaDrill=0.3
 | 
				
			||||||
MinMicroViaDiameter=0.2
 | 
					MinMicroViaDiameter=0.2
 | 
				
			||||||
MinMicroViaDrill=0.09999999999999999
 | 
					MinMicroViaDrill=0.09999999999999999
 | 
				
			||||||
@@ -245,6 +245,17 @@ dPairWidth=0.3
 | 
				
			|||||||
dPairGap=0.26
 | 
					dPairGap=0.26
 | 
				
			||||||
dPairViaGap=0.25
 | 
					dPairViaGap=0.25
 | 
				
			||||||
[pcbnew/Netclasses/1]
 | 
					[pcbnew/Netclasses/1]
 | 
				
			||||||
 | 
					Name=DMX-DIFF120
 | 
				
			||||||
 | 
					Clearance=0.2
 | 
				
			||||||
 | 
					TrackWidth=0.25
 | 
				
			||||||
 | 
					ViaDiameter=0.6
 | 
				
			||||||
 | 
					ViaDrill=0.3
 | 
				
			||||||
 | 
					uViaDiameter=0.3
 | 
				
			||||||
 | 
					uViaDrill=0.1
 | 
				
			||||||
 | 
					dPairWidth=0.25
 | 
				
			||||||
 | 
					dPairGap=0.3
 | 
				
			||||||
 | 
					dPairViaGap=0.25
 | 
				
			||||||
 | 
					[pcbnew/Netclasses/2]
 | 
				
			||||||
Name=LED_SUPPLY
 | 
					Name=LED_SUPPLY
 | 
				
			||||||
Clearance=0.35
 | 
					Clearance=0.35
 | 
				
			||||||
TrackWidth=0.25
 | 
					TrackWidth=0.25
 | 
				
			||||||
@@ -252,6 +263,6 @@ ViaDiameter=0.8
 | 
				
			|||||||
ViaDrill=0.4
 | 
					ViaDrill=0.4
 | 
				
			||||||
uViaDiameter=0.3
 | 
					uViaDiameter=0.3
 | 
				
			||||||
uViaDrill=0.1
 | 
					uViaDrill=0.1
 | 
				
			||||||
dPairWidth=0.2
 | 
					dPairWidth=0.3
 | 
				
			||||||
dPairGap=0.25
 | 
					dPairGap=0.25
 | 
				
			||||||
dPairViaGap=0.25
 | 
					dPairViaGap=0.25
 | 
				
			||||||
 
 | 
				
			|||||||
@@ -175,17 +175,6 @@ F 3 "~" H 3150 4700 50  0001 C CNN
 | 
				
			|||||||
	0    1    1    0   
 | 
						0    1    1    0   
 | 
				
			||||||
$EndComp
 | 
					$EndComp
 | 
				
			||||||
$Comp
 | 
					$Comp
 | 
				
			||||||
L Device:R R6
 | 
					 | 
				
			||||||
U 1 1 5FFFA551
 | 
					 | 
				
			||||||
P 3750 4750
 | 
					 | 
				
			||||||
F 0 "R6" V 3543 4750 50  0000 C CNN
 | 
					 | 
				
			||||||
F 1 "0" V 3634 4750 50  0000 C CNN
 | 
					 | 
				
			||||||
F 2 "Resistor_SMD:R_0603_1608Metric" V 3680 4750 50  0001 C CNN
 | 
					 | 
				
			||||||
F 3 "~" H 3750 4750 50  0001 C CNN
 | 
					 | 
				
			||||||
	1    3750 4750
 | 
					 | 
				
			||||||
	0    1    1    0   
 | 
					 | 
				
			||||||
$EndComp
 | 
					 | 
				
			||||||
$Comp
 | 
					 | 
				
			||||||
L Device:C C14
 | 
					L Device:C C14
 | 
				
			||||||
U 1 1 5FFFC481
 | 
					U 1 1 5FFFC481
 | 
				
			||||||
P 650 5500
 | 
					P 650 5500
 | 
				
			||||||
@@ -265,10 +254,6 @@ Wire Wire Line
 | 
				
			|||||||
	3900 4500 3900 4650
 | 
						3900 4500 3900 4650
 | 
				
			||||||
Wire Wire Line
 | 
					Wire Wire Line
 | 
				
			||||||
	3900 4650 4000 4650
 | 
						3900 4650 4000 4650
 | 
				
			||||||
Wire Wire Line
 | 
					 | 
				
			||||||
	3900 4750 4000 4750
 | 
					 | 
				
			||||||
Wire Wire Line
 | 
					 | 
				
			||||||
	3600 4750 3550 4750
 | 
					 | 
				
			||||||
Wire Wire Line
 | 
					Wire Wire Line
 | 
				
			||||||
	3550 4750 3550 4900
 | 
						3550 4750 3550 4900
 | 
				
			||||||
Wire Wire Line
 | 
					Wire Wire Line
 | 
				
			||||||
@@ -506,7 +491,7 @@ L Device:C C17
 | 
				
			|||||||
U 1 1 60102B69
 | 
					U 1 1 60102B69
 | 
				
			||||||
P 1100 6850
 | 
					P 1100 6850
 | 
				
			||||||
F 0 "C17" H 850 6900 50  0000 L CNN
 | 
					F 0 "C17" H 850 6900 50  0000 L CNN
 | 
				
			||||||
F 1 "100n" H 800 6800 50  0000 L CNN
 | 
					F 1 "DNP" H 800 6800 50  0000 L CNN
 | 
				
			||||||
F 2 "Capacitor_SMD:C_0603_1608Metric" H 1138 6700 50  0001 C CNN
 | 
					F 2 "Capacitor_SMD:C_0603_1608Metric" H 1138 6700 50  0001 C CNN
 | 
				
			||||||
F 3 "~" H 1100 6850 50  0001 C CNN
 | 
					F 3 "~" H 1100 6850 50  0001 C CNN
 | 
				
			||||||
	1    1100 6850
 | 
						1    1100 6850
 | 
				
			||||||
@@ -541,7 +526,7 @@ L Device:C C18
 | 
				
			|||||||
U 1 1 6012E342
 | 
					U 1 1 6012E342
 | 
				
			||||||
P 1300 7100
 | 
					P 1300 7100
 | 
				
			||||||
F 0 "C18" H 1415 7146 50  0000 L CNN
 | 
					F 0 "C18" H 1415 7146 50  0000 L CNN
 | 
				
			||||||
F 1 "100n" H 1415 7055 50  0000 L CNN
 | 
					F 1 "DNP" H 1415 7055 50  0000 L CNN
 | 
				
			||||||
F 2 "Capacitor_SMD:C_0603_1608Metric" H 1338 6950 50  0001 C CNN
 | 
					F 2 "Capacitor_SMD:C_0603_1608Metric" H 1338 6950 50  0001 C CNN
 | 
				
			||||||
F 3 "~" H 1300 7100 50  0001 C CNN
 | 
					F 3 "~" H 1300 7100 50  0001 C CNN
 | 
				
			||||||
	1    1300 7100
 | 
						1    1300 7100
 | 
				
			||||||
@@ -1269,4 +1254,6 @@ Wire Wire Line
 | 
				
			|||||||
Text Label 8850 4950 0    50   ~ 0
 | 
					Text Label 8850 4950 0    50   ~ 0
 | 
				
			||||||
WHITE_PWM
 | 
					WHITE_PWM
 | 
				
			||||||
NoConn ~ 5000 4250
 | 
					NoConn ~ 5000 4250
 | 
				
			||||||
 | 
					Wire Wire Line
 | 
				
			||||||
 | 
						3550 4750 4000 4750
 | 
				
			||||||
$EndSCHEMATC
 | 
					$EndSCHEMATC
 | 
				
			||||||
 
 | 
				
			|||||||
		Reference in New Issue
	
	Block a user