reflow-oven-control-sw/stm-firmware/stm32f407vet6_flash.ld

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/*
* STM32F407VE Linkerscript for FLASH normal flash code execution
* Copyright (C) 2017 Mario H<>ttel <mario.huettel@gmx.net>
*
* This file is part of 'STM32F407 code template'.
*
* It is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 2 of the License.
*
* This code is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this template. If not, see <http://www.gnu.org/licenses/>.
* --------------------------------------------------------------------
* FLASH: 512K
* RAM: 128K
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* CCM RAM: 64K
* FPU: fpv4-sp-d16
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*/
/* USER PARAMETERS */
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__ld_stack_size = 0x3500;
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__ld_heap_size = 0x5000;
__stack_corruption_area_size = 128;
/* END OF USER PARAMETERS */
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ENTRY(Reset_Handler)
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__ld_top_of_stack = 0x20020000; /* One byte above the end of the SRAM. Stack is pre-decrementing, so this is okay */
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/* Available memory areas */
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MEMORY
{
FLASH (xr) : ORIGIN = 0x08000000, LENGTH = 512K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
CCM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
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}
SECTIONS
{
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.vectors : ALIGN(4)
{
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__ld_vectors_start = .;
KEEP(*(.vectors))
. = ALIGN(4);
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__ld_vectors_end = .;
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} >FLASH =0xFF
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.text : ALIGN(4)
{
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__ld_text_start = .;
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP(*(.init)) /* Constructors */
KEEP(*(.fini)) /* Destructors */
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. = ALIGN(4);
__ld_text_end = .;
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} >FLASH =0xFF
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.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
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} >FLASH =0xFF
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.ARM : ALIGN(4)
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
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} >FLASH =0xFF
/* Constructor/Destructor tables */
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.preinit_array : ALIGN(4)
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH =0xFF
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.init_array : ALIGN(4)
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH =0xFF
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.fini_array : ALIGN(4)
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
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/* Ensure LMA of ram data is at 32 bit word address in Flash */
. = ALIGN(4);
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} >FLASH =0xFF
.flashcrc : ALIGN(4)
{
KEEP(*(.flashcrc))
KEEP(*(.flashcrc.*))
. = ALIGN(4);
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} >FLASH =0xFF
/* Initialized CCM data */
__ld_load_ccm_data = LOADADDR(.ccmdata);
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.ccmdata : ALIGN(4)
{
__ld_sdata_ccm = .;
*(.ccm.data)
*(.ccm.data*)
. = ALIGN(4);
__ld_edata_ccm = .;
} >CCM AT> FLASH
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.ccmbss (NOLOAD) : ALIGN(4)
{
__ld_sbss_ccm = .;
*(.ccm.bss)
*(.ccm.bss*)
. = ALIGN(4);
__ld_ebss_ccm = .;
} >CCM
/* Initialized Data */
__ld_load_data = LOADADDR(.data);
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.data : ALIGN(4)
{
__ld_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
__ld_edata = .;
} >RAM AT> FLASH
/* Uninitialized static data */
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.bss (NOLOAD) : ALIGN(4)
{
__ld_sbss = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__ld_ebss = .;
} >RAM
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.heap_stack (NOLOAD) : ALIGN(4)
{
__ld_sheap = .;
. = . + __ld_heap_size;
__ld_eheap = .;
. = ALIGN(4);
__ld_start_stack_corruption_detect_area = .;
. = . + __stack_corruption_area_size;
. = ALIGN(4);
__ld_end_stack_corruption_detect_area = .;
__ld_end_stack = .;
. = . + __ld_stack_size;
. = ALIGN(4);
} >RAM
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}