Fix ADC Watchdog handling
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85fe0f6749
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2d3b61550b
@ -36,6 +36,7 @@ static volatile int * volatile streaming_flag_ptr = NULL;
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static uint32_t filter_startup_cnt;
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static uint32_t filter_startup_cnt;
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static volatile float adc_pt1000_raw_reading_hf;
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static volatile float adc_pt1000_raw_reading_hf;
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static volatile uint16_t dma_sample_buffer[ADC_PT1000_DMA_AVG_SAMPLES];
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static volatile uint16_t dma_sample_buffer[ADC_PT1000_DMA_AVG_SAMPLES];
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static volatile uint32_t adc_watchdog_counter = 0UL;
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volatile float * volatile stream_buffer = NULL;
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volatile float * volatile stream_buffer = NULL;
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volatile uint32_t stream_count;
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volatile uint32_t stream_count;
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@ -322,7 +323,6 @@ static inline __attribute__((optimize("O3"))) float adc_pt1000_dma_avg_pre_filte
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void ADC_IRQHandler(void)
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void ADC_IRQHandler(void)
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{
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{
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uint32_t adc1_sr;
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uint32_t adc1_sr;
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static uint32_t watchdog_errors;
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adc1_sr = ADC1->SR;
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adc1_sr = ADC1->SR;
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@ -331,16 +331,12 @@ void ADC_IRQHandler(void)
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pt1000_error |= ADC_PT1000_OVERFLOW;
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pt1000_error |= ADC_PT1000_OVERFLOW;
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/* Disable ADC in case of overrrun*/
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/* Disable ADC in case of overrrun*/
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adc_pt1000_disable();
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adc_pt1000_disable();
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if (!(adc1_sr & ADC_SR_AWD)) {
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watchdog_errors = 0;
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}
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}
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}
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if (adc1_sr & ADC_SR_AWD) {
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if (adc1_sr & ADC_SR_AWD) {
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ADC1->SR &= ~ADC_SR_AWD;
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ADC1->SR &= ~ADC_SR_AWD;
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watchdog_errors++;
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adc_watchdog_counter++;
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if (watchdog_errors >= ADC_PT1000_WATCHDOG_SAMPLE_COUNT)
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if (adc_watchdog_counter >= ADC_PT1000_WATCHDOG_SAMPLE_COUNT)
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pt1000_error |= ADC_PT1000_WATCHDOG_ERROR;
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pt1000_error |= ADC_PT1000_WATCHDOG_ERROR;
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}
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}
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}
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}
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@ -376,6 +372,9 @@ void DMA2_Stream0_IRQHandler()
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if (streaming_flag_ptr)
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if (streaming_flag_ptr)
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append_stream_buffer(adc_val);
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append_stream_buffer(adc_val);
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if (adc_watchdog_counter > 0UL)
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adc_watchdog_counter--;
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/* Call moving average filter */
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/* Call moving average filter */
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adc_pt1000_filter(adc_val);
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adc_pt1000_filter(adc_val);
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}
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}
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@ -63,7 +63,7 @@
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* @brief Number of ADC samples the value has to be outside the Watchdog limit (@ref ADC_PT1000_UPPER_WATCHDOG and @ref ADC_PT1000_LOWER_WATCHDOG)
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* @brief Number of ADC samples the value has to be outside the Watchdog limit (@ref ADC_PT1000_UPPER_WATCHDOG and @ref ADC_PT1000_LOWER_WATCHDOG)
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* in order to produce a watchdog error
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* in order to produce a watchdog error
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*/
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*/
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#define ADC_PT1000_WATCHDOG_SAMPLE_COUNT 50U
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#define ADC_PT1000_WATCHDOG_SAMPLE_COUNT 25U
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enum adc_pt1000_error {ADC_PT1000_NO_ERR= 0, ADC_PT1000_WATCHDOG_ERROR=(1UL<<0), ADC_PT1000_OVERFLOW=(1UL<<1), ADC_PT1000_INACTIVE = (1UL<<2)};
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enum adc_pt1000_error {ADC_PT1000_NO_ERR= 0, ADC_PT1000_WATCHDOG_ERROR=(1UL<<0), ADC_PT1000_OVERFLOW=(1UL<<1), ADC_PT1000_INACTIVE = (1UL<<2)};
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