Fix style issues in watchdog.c

This commit is contained in:
Mario Hüttel 2022-07-16 14:44:55 +02:00
parent 8fd924829e
commit 48f69d0fb5
1 changed files with 26 additions and 24 deletions

View File

@ -1,22 +1,22 @@
/* Reflow Oven Controller /* Reflow Oven Controller
* *
* Copyright (C) 2020 Mario Hüttel <mario.huettel@gmx.net> * Copyright (C) 2020 Mario Hüttel <mario.huettel@gmx.net>
* *
* This file is part of the Reflow Oven Controller Project. * This file is part of the Reflow Oven Controller Project.
* *
* The reflow oven controller is free software: you can redistribute it and/or modify * The reflow oven controller is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
* The Reflow Oven Control Firmware is distributed in the hope that it will be useful, * The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of * but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with the reflow oven controller project. * along with the reflow oven controller project.
* If not, see <http://www.gnu.org/licenses/>. * If not, see <http://www.gnu.org/licenses/>.
*/ */
/** /**
* @addtogroup watchdog * @addtogroup watchdog
@ -50,7 +50,8 @@ int watchdog_setup(uint8_t prescaler)
RCC->CSR |= RCC_CSR_LSION; RCC->CSR |= RCC_CSR_LSION;
__DSB(); __DSB();
/** - Wait for the oscillator to be ready */ /** - Wait for the oscillator to be ready */
while (!(RCC->CSR & RCC_CSR_LSIRDY)); while (!(RCC->CSR & RCC_CSR_LSIRDY))
;
if (prescaler == 4U) if (prescaler == 4U)
prescaler_reg_val = 0UL; prescaler_reg_val = 0UL;
@ -68,23 +69,24 @@ int watchdog_setup(uint8_t prescaler)
prescaler_reg_val = 6UL; prescaler_reg_val = 6UL;
/** - (De)activate the watchdog during debug access according to @ref WATCHDOG_HALT_DEBUG */ /** - (De)activate the watchdog during debug access according to @ref WATCHDOG_HALT_DEBUG */
if (WATCHDOG_HALT_DEBUG) { if (WATCHDOG_HALT_DEBUG)
DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_IWDG_STOP; DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_IWDG_STOP;
} else { else
DBGMCU->APB1FZ &= ~DBGMCU_APB1_FZ_DBG_IWDG_STOP; DBGMCU->APB1FZ &= ~DBGMCU_APB1_FZ_DBG_IWDG_STOP;
}
/** - Unlock registers */ /** - Unlock registers */
IWDG->KR = STM32_WATCHDOG_REGISTER_ACCESS_KEY; IWDG->KR = STM32_WATCHDOG_REGISTER_ACCESS_KEY;
/** - Wait until prescaler can be written */ /** - Wait until prescaler can be written */
while (IWDG->SR & IWDG_SR_PVU); while (IWDG->SR & IWDG_SR_PVU)
;
/** - Write prescaler value */ /** - Write prescaler value */
IWDG->PR = prescaler_reg_val; IWDG->PR = prescaler_reg_val;
/* - Wait until reload value can be written */ /* - Wait until reload value can be written */
while (IWDG->SR & IWDG_SR_RVU); while (IWDG->SR & IWDG_SR_RVU)
;
/** - Set reload value fixed to 0xFFF */ /** - Set reload value fixed to 0xFFF */
IWDG->RLR = 0xFFFU; IWDG->RLR = 0xFFFU;