Add ring buffer for uart TX
This commit is contained in:
parent
14ba09a716
commit
673e651910
@ -14,9 +14,26 @@ struct dma_ring_buffer_to_mem {
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size_t element_size;
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size_t element_size;
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};
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};
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struct dma_ring_buffer_to_periph {
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void *src_buffer;
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size_t buffer_count;
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DMA_Stream_TypeDef *dma;
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volatile size_t dma_get_idx_current;
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volatile size_t dma_get_idx_future;
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volatile size_t sw_put_idx;
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uint8_t dma_base_id;
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size_t element_size;
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};
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int dma_ring_buffer_periph_to_mem_initialize(struct dma_ring_buffer_to_mem *dma_buffer, uint8_t base_dma_id, DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, size_t element_size, void *data_buffer, void *src_reg, uint8_t dma_trigger_channel);
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int dma_ring_buffer_periph_to_mem_initialize(struct dma_ring_buffer_to_mem *dma_buffer, uint8_t base_dma_id, DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, size_t element_size, void *data_buffer, void *src_reg, uint8_t dma_trigger_channel);
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int dma_ring_buffer_periph_to_mem_get_data(struct dma_ring_buffer_to_mem *buff, const void **data_buff, size_t *len);
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int dma_ring_buffer_periph_to_mem_get_data(struct dma_ring_buffer_to_mem *buff, const void **data_buff, size_t *len);
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void dma_ring_buffer_periph_to_mem_stop(struct dma_ring_buffer_to_mem *buff);
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void dma_ring_buffer_periph_to_mem_stop(struct dma_ring_buffer_to_mem *buff);
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int dma_ring_buffer_mem_to_periph_initialize(struct dma_ring_buffer_to_periph *dma_buffer, uint8_t base_dma_id, DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, size_t element_size, void *data_buffer, uint8_t dma_trigger_channel, void *dest_reg);
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int dma_ring_buffer_mem_to_periph_insert_data(struct dma_ring_buffer_to_periph *buff, const void *data_to_insert, size_t count);
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void dma_ring_buffer_mem_to_periph_int_callback(struct dma_ring_buffer_to_periph *buff);
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void dma_ring_buffer_mem_to_periph_stop(struct dma_ring_buffer_to_periph *buff);
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#endif /* __DMA_RING_BUFFER_H__ */
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#endif /* __DMA_RING_BUFFER_H__ */
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@ -6,7 +6,7 @@
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#define UART_RECEIVE_DMA_STREAM DMA2_Stream5
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#define UART_RECEIVE_DMA_STREAM DMA2_Stream5
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#define UART_SEND_DMA_STREAM
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#define UART_SEND_DMA_STREAM DMA2_Stream7
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#define UART_PERIPH USART1
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#define UART_PERIPH USART1
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#define UART_RCC_MASK RCC_APB2ENR_USART1EN
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#define UART_RCC_MASK RCC_APB2ENR_USART1EN
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@ -42,11 +42,11 @@ void uart_send_char(char c);
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void uart_send_array(const char *data, uint32_t len);
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void uart_send_array(const char *data, uint32_t len);
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void uart_send_string(char *string);
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void uart_send_string(const char *string);
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void uart_send_array_with_dma(char *data, uint32_t len);
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void uart_send_array_with_dma(const char *data, uint32_t len);
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void uart_send_string_with_dma(char *string);
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void uart_send_string_with_dma(const char *string);
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int uart_receive_data_with_dma(const char **data, size_t *len);
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int uart_receive_data_with_dma(const char **data, size_t *len);
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@ -57,7 +57,6 @@ int main()
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shell_handle_input(shell_handle, uart_input, uart_input_len);
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shell_handle_input(shell_handle, uart_input, uart_input_len);
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}
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}
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//systick_wait_ms(300);
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//systick_wait_ms(300);
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}
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}
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}
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}
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@ -16,8 +16,7 @@ static char history_buffer[1024];
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static shellmatta_retCode_t write_shell_callback(const char *data, uint32_t len)
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static shellmatta_retCode_t write_shell_callback(const char *data, uint32_t len)
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{
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{
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uart_send_array(data, len);
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uart_send_array_with_dma(data, len);
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return SHELLMATTA_OK;
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return SHELLMATTA_OK;
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}
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}
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@ -1,6 +1,7 @@
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#include <uart/dma-ring-buffer.h>
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#include <uart/dma-ring-buffer.h>
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#include <clock-enable-manager.h>
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#include <clock-enable-manager.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include <string.h>
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static int dma_ring_buffer_switch_clock_enable(uint8_t base_dma, bool clk_en)
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static int dma_ring_buffer_switch_clock_enable(uint8_t base_dma, bool clk_en)
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{
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{
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@ -105,3 +106,135 @@ void dma_ring_buffer_periph_to_mem_stop(struct dma_ring_buffer_to_mem *buff)
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dma_ring_buffer_switch_clock_enable(buff->base_dma_id, false);
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dma_ring_buffer_switch_clock_enable(buff->base_dma_id, false);
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}
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}
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int dma_ring_buffer_mem_to_periph_initialize(struct dma_ring_buffer_to_periph *dma_buffer, uint8_t base_dma_id, DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, size_t element_size, void *data_buffer, uint8_t dma_trigger_channel, void *dest_reg)
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{
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if (!dma_buffer || !dma_stream || !data_buffer || !dest_reg)
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return -1000;
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dma_buffer->dma = dma_stream;
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dma_buffer->dma_base_id = base_dma_id;
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dma_buffer->src_buffer = data_buffer;
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dma_buffer->buffer_count = buffer_element_count;
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dma_buffer->element_size = element_size;
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dma_buffer->sw_put_idx = 0U;
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dma_buffer->dma_get_idx_current = 0U;
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dma_buffer->dma_get_idx_future = 0U;
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dma_ring_buffer_switch_clock_enable(base_dma_id, true);
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dma_stream->PAR = (uint32_t)dest_reg;
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dma_stream->CR = DMA_SxCR_MINC | DMA_SxCR_TCIE | (dma_trigger_channel<<25) | DMA_SxCR_DIR_0;
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return 0;
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}
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static size_t calculate_ring_buffer_fill_level(size_t buffer_size, size_t get_idx, size_t put_idx)
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{
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size_t fill_level;
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if (put_idx >= get_idx) {
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fill_level = (put_idx - get_idx);
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} else {
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fill_level = buffer_size - get_idx + put_idx;
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}
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return fill_level;
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}
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static void queue_or_start_dma_transfer(struct dma_ring_buffer_to_periph *buff)
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{
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uint32_t dma_transfer_cnt;
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if (!buff)
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return;
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/* Check if DMA is running. Do nothing in this case. Will be stated from interrupt */
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if (buff->dma_get_idx_current != buff->dma_get_idx_future)
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return;
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/* No new data to transfer */
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if (buff->sw_put_idx == buff->dma_get_idx_current)
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return;
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/* Calculate future get idx. Stop at end of buffer to prevent impossible wrap around */
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if (buff->sw_put_idx < buff->dma_get_idx_current && buff->sw_put_idx != 0) {
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buff->dma_get_idx_future = 0U;
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dma_transfer_cnt = buff->buffer_count - buff->dma_get_idx_current;
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} else {
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buff->dma_get_idx_future = buff->sw_put_idx;
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if (buff->sw_put_idx == 0)
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dma_transfer_cnt = buff->buffer_count - buff->dma_get_idx_current;
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else
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dma_transfer_cnt = buff->sw_put_idx - buff->dma_get_idx_current;
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}
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buff->dma->NDTR = dma_transfer_cnt;
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buff->dma->M0AR = (uint32_t)&((char *)buff->src_buffer)[buff->dma_get_idx_current * buff->element_size];
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buff->dma->CR |= DMA_SxCR_EN;
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}
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int dma_ring_buffer_mem_to_periph_insert_data(struct dma_ring_buffer_to_periph *buff, const void *data_to_insert, size_t count)
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{
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int ret = 0;
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size_t free_item_count;
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char *insert_ptr;
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char *dest_ptr;
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void *ptr;
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size_t first_round_count;
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if (!buff || !data_to_insert || !count)
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return -1000;
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/* Check if data fits into buffer minus one element. If not: try full-1 buffer and rest
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* Buffer is not allowed to be completely full, because I cannot ddifferentiate a full buffer from a completely empty one
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*/
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if (count >= buff->buffer_count) {
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ret = dma_ring_buffer_mem_to_periph_insert_data(buff, data_to_insert, buff->buffer_count - 1);
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if (ret)
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goto return_retval;
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ptr = (void *)(((char *)data_to_insert) + ((buff->buffer_count-1) * buff->element_size));
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ret = dma_ring_buffer_mem_to_periph_insert_data(buff, ptr, count - buff->buffer_count + 1);
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goto return_retval;
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}
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/* Wait for buffer to be able to handle input */
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do {
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free_item_count = buff->buffer_count - calculate_ring_buffer_fill_level(buff->buffer_count, buff->dma_get_idx_current, buff->sw_put_idx);
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} while (free_item_count < count+1);
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/* Fillup buffer (max is buffer end, wrap around afterwards) */
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insert_ptr = (char *)data_to_insert;
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dest_ptr = &((char *)buff->src_buffer)[buff->sw_put_idx * buff->element_size];
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if (buff->buffer_count - buff->sw_put_idx >= count) {
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memcpy(dest_ptr, insert_ptr, buff->element_size * count);
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buff->sw_put_idx += count;
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if(buff->sw_put_idx >= buff->buffer_count)
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buff->sw_put_idx = 0;
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} else {
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first_round_count = buff->element_size * (buff->buffer_count - buff->sw_put_idx);
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memcpy(dest_ptr, insert_ptr, first_round_count);
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insert_ptr += first_round_count;
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memcpy(buff->src_buffer, insert_ptr, count - first_round_count);
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buff->sw_put_idx = count - first_round_count;
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}
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queue_or_start_dma_transfer(buff);
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return_retval:
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return ret;
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}
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void dma_ring_buffer_mem_to_periph_int_callback(struct dma_ring_buffer_to_periph *buff)
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{
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/* update current get index */
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buff->dma_get_idx_current = buff->dma_get_idx_future;
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queue_or_start_dma_transfer(buff);
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}
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void dma_ring_buffer_mem_to_periph_stop(struct dma_ring_buffer_to_periph *buff)
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{
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buff->dma->CR = 0;
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dma_ring_buffer_switch_clock_enable(buff->dma_base_id, false);
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memset(buff, 0, sizeof(struct dma_ring_buffer_to_periph));
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}
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@ -13,10 +13,12 @@
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#include <clock-enable-manager.h>
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#include <clock-enable-manager.h>
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#include <stm32-gpio-macros.h>
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#include <stm32-gpio-macros.h>
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#include <uart/dma-ring-buffer.h>
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#include <uart/dma-ring-buffer.h>
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#include <string.h>
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static struct dma_ring_buffer_to_mem ring_buff_rx;
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static struct dma_ring_buffer_to_mem ring_buff_rx;
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static struct dma_ring_buffer_to_periph ring_buff_tx;
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static char uart_rx_buffer[64];
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static char uart_rx_buffer[64];
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static char uart_tx_buffer[256];
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#ifdef DEBUGBUILD
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#ifdef DEBUGBUILD
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static inline void uart_gpio_config()
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static inline void uart_gpio_config()
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@ -41,6 +43,10 @@ void uart_init_with_dma()
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dma_ring_buffer_periph_to_mem_initialize(&ring_buff_rx, 2, UART_RECEIVE_DMA_STREAM, sizeof(uart_rx_buffer), 1U,
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dma_ring_buffer_periph_to_mem_initialize(&ring_buff_rx, 2, UART_RECEIVE_DMA_STREAM, sizeof(uart_rx_buffer), 1U,
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uart_rx_buffer, (char *)&UART_PERIPH->DR, 4);
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uart_rx_buffer, (char *)&UART_PERIPH->DR, 4);
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dma_ring_buffer_mem_to_periph_initialize(&ring_buff_tx, 2, UART_SEND_DMA_STREAM, sizeof(uart_tx_buffer), 1U,
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uart_tx_buffer, 4U, (void *)&UART_PERIPH->DR);
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NVIC_EnableIRQ(DMA2_Stream7_IRQn);
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}
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}
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void uart_disable()
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void uart_disable()
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@ -49,7 +55,7 @@ void uart_disable()
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UART_PERIPH->CR2 = 0;
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UART_PERIPH->CR2 = 0;
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UART_PERIPH->CR3 = 0;
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UART_PERIPH->CR3 = 0;
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dma_ring_buffer_periph_to_mem_stop(&ring_buff_rx);
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dma_ring_buffer_periph_to_mem_stop(&ring_buff_rx);
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dma_ring_buffer_mem_to_periph_stop(&ring_buff_tx);
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rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
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rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
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rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
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rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
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}
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}
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@ -68,7 +74,7 @@ void uart_send_array(const char *data, uint32_t len)
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uart_send_char(data[i]);
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uart_send_char(data[i]);
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}
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}
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void uart_send_string(char *string)
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void uart_send_string(const char *string)
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{
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{
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int i;
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int i;
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@ -76,11 +82,30 @@ void uart_send_string(char *string)
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uart_send_char(string[i]);
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uart_send_char(string[i]);
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}
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}
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void uart_send_array_with_dma(char *data, uint32_t len);
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void uart_send_array_with_dma(const char *data, uint32_t len)
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{
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dma_ring_buffer_mem_to_periph_insert_data(&ring_buff_tx, data, len);
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}
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void uart_send_string_with_dma(char *string);
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void uart_send_string_with_dma(const char *string)
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{
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size_t len;
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len = strlen(string);
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uart_send_array_with_dma(string, (uint32_t)len);
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}
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int uart_receive_data_with_dma(const char **data, size_t *len)
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int uart_receive_data_with_dma(const char **data, size_t *len)
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{
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{
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return dma_ring_buffer_periph_to_mem_get_data(&ring_buff_rx, (const void **)data, len);
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return dma_ring_buffer_periph_to_mem_get_data(&ring_buff_rx, (const void **)data, len);
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}
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}
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void DMA2_Stream7_IRQHandler()
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{
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uint32_t hisr = DMA2->HISR;
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DMA2->HIFCR = hisr;
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if (hisr & DMA_HISR_TCIF7) {
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dma_ring_buffer_mem_to_periph_int_callback(&ring_buff_tx);
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}
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}
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