* Improve uart dma ring buffer. Sending dma still missing

* Add digio module for controlling LEDs, Loudspeaker, and the Digital IOs
* General code improvements
This commit is contained in:
2020-02-10 22:38:24 +01:00
parent 48fea3d36e
commit 69c00ff3d3
14 changed files with 340 additions and 96 deletions

View File

@@ -1,33 +1,56 @@
#include <uart/dma-ring-buffer.h>
#include <clock-enable-manager.h>
#include <stdbool.h>
int dma_ring_buffer_initialize(struct dma_ring_buffer *dma_buffer, uint8_t base_dma_id, DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, char *data_buffer, void* src_reg, uint8_t dma_trigger_channel)
static int dma_ring_buffer_switch_clock_enable(uint8_t base_dma, bool clk_en)
{
int ret_val;
int (*clk_func)(volatile uint32_t *, uint8_t);
if (clk_en)
clk_func = rcc_manager_enable_clock;
else
clk_func = rcc_manager_disable_clock;
switch (base_dma) {
case 1:
ret_val = clk_func(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA1EN));
break;
case 2:
ret_val = clk_func(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA2EN));
break;
default:
ret_val = -1000;
break;
}
return ret_val;
}
int dma_ring_buffer_periph_to_mem_initialize(struct dma_ring_buffer_to_mem *dma_buffer, uint8_t base_dma_id,
DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, size_t element_size,
void *data_buffer, void* src_reg, uint8_t dma_trigger_channel)
{
int ret_val = 0;
if (!dma_buffer || !dma_stream || !data_buffer || !src_reg)
return -1;
return -1000;
if (dma_trigger_channel > 7)
return -3;
return -1007;
dma_buffer->base_dma_id = base_dma_id;
switch (base_dma_id) {
case 1:
rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA1EN));
break;
case 2:
rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA2EN));
break;
default:
return -2;
break;
}
ret_val = dma_ring_buffer_switch_clock_enable(base_dma_id, true);
if (ret_val)
return ret_val;
dma_buffer->dma = dma_stream;
dma_buffer->get_idx = 0;
dma_buffer->buffer_count = buffer_element_count;
dma_buffer->data_ptr = data_buffer;
dma_buffer->element_size = element_size;
dma_stream->PAR = (uint32_t)src_reg;
dma_stream->M0AR = (uint32_t)data_buffer;
@@ -39,7 +62,7 @@ int dma_ring_buffer_initialize(struct dma_ring_buffer *dma_buffer, uint8_t base_
return 0;
}
int dma_ring_buffer_get_data(struct dma_ring_buffer *buff, const char **data_buff, size_t *len)
int dma_ring_buffer_periph_to_mem_get_data(struct dma_ring_buffer_to_mem *buff, const void **data_buff, size_t *len)
{
int ret_code = 0;
uint32_t ndtr;
@@ -54,12 +77,12 @@ int dma_ring_buffer_get_data(struct dma_ring_buffer *buff, const char **data_buf
/* Check if wrap around */
if (put_idx < buff->get_idx) {
*data_buff = &(buff->data_ptr[buff->get_idx]);
*data_buff = &(((char *)buff->data_ptr)[buff->get_idx * buff->element_size]);
*len = buff->buffer_count - buff->get_idx;
buff->get_idx = 0;
ret_code = 1;
} else if (put_idx > buff->get_idx) {
*data_buff = &(buff->data_ptr[buff->get_idx]);
*data_buff = &(((char *)buff->data_ptr)[buff->get_idx * buff->element_size]);
*len = put_idx - buff->get_idx;
buff->get_idx += *len;
} else {
@@ -70,7 +93,7 @@ int dma_ring_buffer_get_data(struct dma_ring_buffer *buff, const char **data_buf
return ret_code;
}
void dma_ring_buffer_stop(struct dma_ring_buffer *buff)
void dma_ring_buffer_periph_to_mem_stop(struct dma_ring_buffer_to_mem *buff)
{
if (!buff || !buff->dma)
return;
@@ -80,14 +103,5 @@ void dma_ring_buffer_stop(struct dma_ring_buffer *buff)
buff->dma->M1AR = 0;
buff->dma->FCR = 0;
switch (buff->base_dma_id) {
case 1:
rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA1EN));
break;
case 2:
rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA2EN));
break;
default:
break;
}
dma_ring_buffer_switch_clock_enable(buff->base_dma_id, false);
}

View File

@@ -14,42 +14,11 @@
#include <stm32-gpio-macros.h>
#include <uart/dma-ring-buffer.h>
static struct dma_ring_buffer ring_buff;
static struct dma_ring_buffer_to_mem ring_buff_rx;
static char uart_rx_buffer[64];
void initUART() {
__DSB();
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
__DSB();
GPIOA->MODER |= (1<<5);
GPIOA->AFR[0] |= (7<<8); //Enable Clock
GPIOA->MODER |= (1<<5);
GPIOA->AFR[0] |= (7<<8);
asm("nop");
asm("nop");
asm("nop");
USART2->BRR = 0x1117; //Baudrate 273.4375=>0x1117 9600baud bei 42MHz Periph
USART2->CR1 = USART_CR1_UE | USART_CR1_TE;
}
void sendChar(char c) {
while(!(USART2->SR & USART_SR_TXE));
USART2->DR = c;
}
void sendString(char* s, int count) {
int i = 0;
for (i = 0; i < count; i++,s++)
{
if (!(*s))
break;
sendChar(*s);
}
}
#ifdef DEBUGBUILD
static inline void uart_gpio_config()
{
rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
@@ -58,17 +27,20 @@ static inline void uart_gpio_config()
SETAF(UART_PORT, UART_RX_PIN, UART_RX_PIN_ALTFUNC);
SETAF(UART_PORT, UART_TX_PIN, UART_TX_PIN_ALTFUNC);
}
#endif
void uart_init_with_dma()
{
rcc_manager_enable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
#ifdef DEBUGBUILD
uart_gpio_config();
#endif
UART_PERIPH->BRR = UART_BRR_REG_VALUE;
UART_PERIPH->CR3 = USART_CR3_DMAR | USART_CR3_DMAT;
UART_PERIPH->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE;
dma_ring_buffer_initialize(&ring_buff, 2, DMA2_Stream5, sizeof(uart_rx_buffer), uart_rx_buffer, (char *)&UART_PERIPH->DR, 4);
dma_ring_buffer_periph_to_mem_initialize(&ring_buff_rx, 2, UART_RECEIVE_DMA_STREAM, sizeof(uart_rx_buffer), 1U,
uart_rx_buffer, (char *)&UART_PERIPH->DR, 4);
}
void uart_disable()
@@ -76,7 +48,7 @@ void uart_disable()
UART_PERIPH->CR1 = 0;
UART_PERIPH->CR2 = 0;
UART_PERIPH->CR3 = 0;
dma_ring_buffer_stop(&ring_buff);
dma_ring_buffer_periph_to_mem_stop(&ring_buff_rx);
rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
@@ -110,5 +82,5 @@ void uart_send_string_with_dma(char *string);
int uart_receive_data_with_dma(const char **data, size_t *len)
{
return dma_ring_buffer_get_data(&ring_buff, data, len);
return dma_ring_buffer_periph_to_mem_get_data(&ring_buff_rx, (const void **)data, len);
}