* Improve uart dma ring buffer. Sending dma still missing
* Add digio module for controlling LEDs, Loudspeaker, and the Digital IOs * General code improvements
This commit is contained in:
@@ -1,33 +1,56 @@
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#include <uart/dma-ring-buffer.h>
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#include <clock-enable-manager.h>
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#include <stdbool.h>
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int dma_ring_buffer_initialize(struct dma_ring_buffer *dma_buffer, uint8_t base_dma_id, DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, char *data_buffer, void* src_reg, uint8_t dma_trigger_channel)
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static int dma_ring_buffer_switch_clock_enable(uint8_t base_dma, bool clk_en)
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{
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int ret_val;
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int (*clk_func)(volatile uint32_t *, uint8_t);
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if (clk_en)
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clk_func = rcc_manager_enable_clock;
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else
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clk_func = rcc_manager_disable_clock;
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switch (base_dma) {
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case 1:
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ret_val = clk_func(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA1EN));
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break;
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case 2:
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ret_val = clk_func(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA2EN));
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break;
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default:
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ret_val = -1000;
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break;
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}
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return ret_val;
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}
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int dma_ring_buffer_periph_to_mem_initialize(struct dma_ring_buffer_to_mem *dma_buffer, uint8_t base_dma_id,
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DMA_Stream_TypeDef *dma_stream, size_t buffer_element_count, size_t element_size,
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void *data_buffer, void* src_reg, uint8_t dma_trigger_channel)
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{
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int ret_val = 0;
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if (!dma_buffer || !dma_stream || !data_buffer || !src_reg)
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return -1;
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return -1000;
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if (dma_trigger_channel > 7)
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return -3;
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return -1007;
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dma_buffer->base_dma_id = base_dma_id;
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switch (base_dma_id) {
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case 1:
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rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA1EN));
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break;
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case 2:
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rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA2EN));
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break;
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default:
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return -2;
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break;
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}
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ret_val = dma_ring_buffer_switch_clock_enable(base_dma_id, true);
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if (ret_val)
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return ret_val;
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dma_buffer->dma = dma_stream;
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dma_buffer->get_idx = 0;
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dma_buffer->buffer_count = buffer_element_count;
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dma_buffer->data_ptr = data_buffer;
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dma_buffer->element_size = element_size;
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dma_stream->PAR = (uint32_t)src_reg;
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dma_stream->M0AR = (uint32_t)data_buffer;
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@@ -39,7 +62,7 @@ int dma_ring_buffer_initialize(struct dma_ring_buffer *dma_buffer, uint8_t base_
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return 0;
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}
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int dma_ring_buffer_get_data(struct dma_ring_buffer *buff, const char **data_buff, size_t *len)
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int dma_ring_buffer_periph_to_mem_get_data(struct dma_ring_buffer_to_mem *buff, const void **data_buff, size_t *len)
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{
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int ret_code = 0;
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uint32_t ndtr;
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@@ -54,12 +77,12 @@ int dma_ring_buffer_get_data(struct dma_ring_buffer *buff, const char **data_buf
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/* Check if wrap around */
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if (put_idx < buff->get_idx) {
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*data_buff = &(buff->data_ptr[buff->get_idx]);
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*data_buff = &(((char *)buff->data_ptr)[buff->get_idx * buff->element_size]);
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*len = buff->buffer_count - buff->get_idx;
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buff->get_idx = 0;
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ret_code = 1;
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} else if (put_idx > buff->get_idx) {
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*data_buff = &(buff->data_ptr[buff->get_idx]);
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*data_buff = &(((char *)buff->data_ptr)[buff->get_idx * buff->element_size]);
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*len = put_idx - buff->get_idx;
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buff->get_idx += *len;
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} else {
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@@ -70,7 +93,7 @@ int dma_ring_buffer_get_data(struct dma_ring_buffer *buff, const char **data_buf
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return ret_code;
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}
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void dma_ring_buffer_stop(struct dma_ring_buffer *buff)
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void dma_ring_buffer_periph_to_mem_stop(struct dma_ring_buffer_to_mem *buff)
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{
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if (!buff || !buff->dma)
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return;
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@@ -80,14 +103,5 @@ void dma_ring_buffer_stop(struct dma_ring_buffer *buff)
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buff->dma->M1AR = 0;
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buff->dma->FCR = 0;
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switch (buff->base_dma_id) {
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case 1:
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rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA1EN));
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break;
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case 2:
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rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(RCC_AHB1ENR_DMA2EN));
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break;
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default:
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break;
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}
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dma_ring_buffer_switch_clock_enable(buff->base_dma_id, false);
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}
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@@ -14,42 +14,11 @@
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#include <stm32-gpio-macros.h>
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#include <uart/dma-ring-buffer.h>
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static struct dma_ring_buffer ring_buff;
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static struct dma_ring_buffer_to_mem ring_buff_rx;
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static char uart_rx_buffer[64];
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void initUART() {
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__DSB();
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
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RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
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__DSB();
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GPIOA->MODER |= (1<<5);
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GPIOA->AFR[0] |= (7<<8); //Enable Clock
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GPIOA->MODER |= (1<<5);
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GPIOA->AFR[0] |= (7<<8);
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asm("nop");
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asm("nop");
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asm("nop");
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USART2->BRR = 0x1117; //Baudrate 273.4375=>0x1117 9600baud bei 42MHz Periph
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USART2->CR1 = USART_CR1_UE | USART_CR1_TE;
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}
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void sendChar(char c) {
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while(!(USART2->SR & USART_SR_TXE));
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USART2->DR = c;
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}
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void sendString(char* s, int count) {
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int i = 0;
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for (i = 0; i < count; i++,s++)
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{
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if (!(*s))
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break;
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sendChar(*s);
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}
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}
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#ifdef DEBUGBUILD
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static inline void uart_gpio_config()
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{
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rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
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@@ -58,17 +27,20 @@ static inline void uart_gpio_config()
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SETAF(UART_PORT, UART_RX_PIN, UART_RX_PIN_ALTFUNC);
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SETAF(UART_PORT, UART_TX_PIN, UART_TX_PIN_ALTFUNC);
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}
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#endif
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void uart_init_with_dma()
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{
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rcc_manager_enable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
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#ifdef DEBUGBUILD
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uart_gpio_config();
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#endif
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UART_PERIPH->BRR = UART_BRR_REG_VALUE;
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UART_PERIPH->CR3 = USART_CR3_DMAR | USART_CR3_DMAT;
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UART_PERIPH->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE;
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dma_ring_buffer_initialize(&ring_buff, 2, DMA2_Stream5, sizeof(uart_rx_buffer), uart_rx_buffer, (char *)&UART_PERIPH->DR, 4);
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dma_ring_buffer_periph_to_mem_initialize(&ring_buff_rx, 2, UART_RECEIVE_DMA_STREAM, sizeof(uart_rx_buffer), 1U,
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uart_rx_buffer, (char *)&UART_PERIPH->DR, 4);
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}
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void uart_disable()
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@@ -76,7 +48,7 @@ void uart_disable()
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UART_PERIPH->CR1 = 0;
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UART_PERIPH->CR2 = 0;
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UART_PERIPH->CR3 = 0;
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dma_ring_buffer_stop(&ring_buff);
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dma_ring_buffer_periph_to_mem_stop(&ring_buff_rx);
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rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
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rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
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@@ -110,5 +82,5 @@ void uart_send_string_with_dma(char *string);
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int uart_receive_data_with_dma(const char **data, size_t *len)
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{
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return dma_ring_buffer_get_data(&ring_buff, data, len);
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return dma_ring_buffer_periph_to_mem_get_data(&ring_buff_rx, (const void **)data, len);
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}
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