Add functions for eeprom. Not yet implemented
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@ -45,7 +45,7 @@ CFILES += rotary-encoder.c button.c
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CFILES += ui/lcd.c ui/menu.c ui/gui.c
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CFILES += fatfs/diskio.c fatfs/ff.c fatfs/ffsystem.c fatfs/ffunicode.c fatfs/shimatta_sdio_driver/shimatta_sdio.c
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CFILES += pid-controller.c oven-driver.c
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CFILES += settings/settings.c settings/settings-sd-card.c
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CFILES += settings/settings.c settings/settings-sd-card.c settings/spi-eeprom.c
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CFILES += stm-periph/crc-unit.c
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CFILES += safety/safety-adc.c safety/safety-controller.c safety/watchdog.c safety/fault.c safety/safety-memory.c safety/stack-check.c
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CFILES += hw-version-detect.c
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@ -0,0 +1,36 @@
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/* Reflow Oven Controller
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*
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* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _SPI_EEPROM_HWCFG_H_
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#define _SPI_EEPROM_HWCFG_H_
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#include <stm32/stm32f4xx.h>
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#define SPI_EEPROM_SPI_PORT GPIOA
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#define SPI_EEPROM_SPI_PORT_RCC_REG RCC->AHB1ENR
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#define SPI_EEPROM_SPI_PORT_RCC_MASK RCC_AHB1ENR_GPIOAEN
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#define SPI_EEPROM_SPI_ALTFUNC_NO (5)
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#define SPI_EEPROM_MISO_PIN (6)
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#define SPI_EEPROM_MOSI_PIN (7)
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#define SPI_EEPROM_SCK_PIN (5)
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#define SPI_EEPROM_CS_PIN (4)
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#endif /* _SPI_EEPROM_HWCFG_H_ */
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@ -0,0 +1,36 @@
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/* Reflow Oven Controller
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*
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* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __SETTINGS_SPI_EEPROM_H__
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#define __SETTINGS_SPI_EEPROM_H__
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#include <stdint.h>
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int spi_eeprom_init();
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void spi_eeprom_deinit();
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int spi_eeprom_read(uint32_t addr, uint8_t *rx_buff, uint32_t count);
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int spi_eeprom_write(uint32_t addr, const uint8_t *data, uint32_t count);
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uint8_t spi_eeprom_read_status_reg(void);
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#endif /* __SETTINGS_SPI_EEPROM_H__ */
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@ -0,0 +1,115 @@
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/* Reflow Oven Controller
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*
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* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <reflow-controller/settings/spi-eeprom.h>
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#include <stm-periph/spi.h>
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#include <reflow-controller/periph-config/spi-eeprom-hwcfg.h>
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#include <stm-periph/rcc-manager.h>
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#include <stm-periph/stm32-gpio-macros.h>
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#define EEPROM_SIZE 0x200
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#define EEPROM_PAGE_SIZE 16
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static stm_spi_handle eeprom_spi_handle;
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static void eeprom_cs_activate(void)
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{
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SPI_EEPROM_SPI_PORT->ODR &= ~(1<<SPI_EEPROM_CS_PIN);
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}
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static void eeprom_cs_deactivate(void)
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{
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SPI_EEPROM_SPI_PORT->ODR |= (1<<SPI_EEPROM_CS_PIN);
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}
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int spi_eeprom_init()
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{
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static struct stm_spi_dev spi_dev;
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struct stm_spi_settings settings;
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rcc_manager_enable_clock(&SPI_EEPROM_SPI_PORT_RCC_REG, BITMASK_TO_BITNO(SPI_EEPROM_SPI_PORT_RCC_MASK));
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SPI_EEPROM_SPI_PORT->MODER &= MODER_DELETE(SPI_EEPROM_CS_PIN) & MODER_DELETE(SPI_EEPROM_MISO_PIN) &
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MODER_DELETE(SPI_EEPROM_MOSI_PIN) & MODER_DELETE(SPI_EEPROM_SCK_PIN);
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SPI_EEPROM_SPI_PORT->MODER |= ALTFUNC(SPI_EEPROM_MISO_PIN) | ALTFUNC(SPI_EEPROM_SCK_PIN) | ALTFUNC(SPI_EEPROM_MOSI_PIN);
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SPI_EEPROM_SPI_PORT->MODER |= OUTPUT(SPI_EEPROM_CS_PIN);
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SETAF(SPI_EEPROM_SPI_PORT, SPI_EEPROM_MISO_PIN, SPI_EEPROM_SPI_ALTFUNC_NO);
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SETAF(SPI_EEPROM_SPI_PORT, SPI_EEPROM_MOSI_PIN, SPI_EEPROM_SPI_ALTFUNC_NO);
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SETAF(SPI_EEPROM_SPI_PORT, SPI_EEPROM_SCK_PIN, SPI_EEPROM_SPI_ALTFUNC_NO);
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eeprom_cs_deactivate();
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settings.cpha = false;
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settings.cpol = false;
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settings.cs_activate = eeprom_cs_activate;
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settings.cs_deactivate = eeprom_cs_deactivate;
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settings.master = true;
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settings.msb_first = true;
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settings.prescaler = SPI_PRSC_DIV64;
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eeprom_spi_handle = spi_init(&spi_dev, SPI1, &settings);
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if (eeprom_spi_handle)
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return 0;
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else
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return -1;
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}
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void spi_eeprom_deinit()
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{
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spi_deinit(eeprom_spi_handle);
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SPI_EEPROM_SPI_PORT->MODER &= MODER_DELETE(SPI_EEPROM_CS_PIN) & MODER_DELETE(SPI_EEPROM_MISO_PIN) &
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MODER_DELETE(SPI_EEPROM_MOSI_PIN) & MODER_DELETE(SPI_EEPROM_SCK_PIN);
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rcc_manager_disable_clock(&SPI_EEPROM_SPI_PORT_RCC_REG, BITMASK_TO_BITNO(SPI_EEPROM_SPI_PORT_RCC_MASK));
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}
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uint8_t spi_eeprom_read_status_reg(void)
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{
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uint8_t buff[2] = {0x05, 0x00};
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(void)spi_transfer(eeprom_spi_handle, buff, buff, 2, true);
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return buff[1];
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}
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int spi_eeprom_read(uint32_t addr, uint8_t *rx_buff, uint32_t count)
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{
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int ret = 0;
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if (!rx_buff || !count)
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return -1000;
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if (addr >= EEPROM_SIZE)
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return -1001;
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eeprom_cs_activate();
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eeprom_cs_deactivate();
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return ret;
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}
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int spi_eeprom_write(uint32_t addr, const uint8_t *data, uint32_t count);
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