mhu/reflow-oven-control-sw
2
0
Fork 0
Code Issues 4 Pull Requests Releases 4 Wiki Activity

Add functions for eeprom. Not yet implemented

Browse Source
This commit is contained in:
Mario Hüttel 2021-01-02 23:03:59 +01:00
parent 6e3f90d38e
commit 95bd606dd8
4 changed files with 188 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
stm-firmware/Makefile
View File

@ -45,7 +45,7 @@ CFILES += rotary-encoder.c button.c
CFILES += ui/lcd.c ui/menu.c ui/gui.c
CFILES += fatfs/diskio.c fatfs/ff.c fatfs/ffsystem.c fatfs/ffunicode.c fatfs/shimatta_sdio_driver/shimatta_sdio.c
CFILES += pid-controller.c oven-driver.c
CFILES += settings/settings.c settings/settings-sd-card.c
CFILES += settings/settings.c settings/settings-sd-card.c settings/spi-eeprom.c
CFILES += stm-periph/crc-unit.c
CFILES += safety/safety-adc.c safety/safety-controller.c safety/watchdog.c safety/fault.c safety/safety-memory.c safety/stack-check.c
CFILES += hw-version-detect.c

36
stm-firmware/include/reflow-controller/periph-config/spi-eeprom-hwcfg.h Normal file
View File

@ -0,0 +1,36 @@
/* Reflow Oven Controller
*
* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
*
* This file is part of the Reflow Oven Controller Project.
*
* The reflow oven controller is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with the reflow oven controller project.
* If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _SPI_EEPROM_HWCFG_H_
#define _SPI_EEPROM_HWCFG_H_
#include <stm32/stm32f4xx.h>
#define SPI_EEPROM_SPI_PORT GPIOA
#define SPI_EEPROM_SPI_PORT_RCC_REG RCC->AHB1ENR
#define SPI_EEPROM_SPI_PORT_RCC_MASK RCC_AHB1ENR_GPIOAEN
#define SPI_EEPROM_SPI_ALTFUNC_NO (5)
#define SPI_EEPROM_MISO_PIN (6)
#define SPI_EEPROM_MOSI_PIN (7)
#define SPI_EEPROM_SCK_PIN (5)
#define SPI_EEPROM_CS_PIN (4)
#endif /* _SPI_EEPROM_HWCFG_H_ */

36
stm-firmware/include/reflow-controller/settings/spi-eeprom.h Normal file
View File

@ -0,0 +1,36 @@
/* Reflow Oven Controller
*
* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
*
* This file is part of the Reflow Oven Controller Project.
*
* The reflow oven controller is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with the reflow oven controller project.
* If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __SETTINGS_SPI_EEPROM_H__
#define __SETTINGS_SPI_EEPROM_H__
#include <stdint.h>
int spi_eeprom_init();
void spi_eeprom_deinit();
int spi_eeprom_read(uint32_t addr, uint8_t *rx_buff, uint32_t count);
int spi_eeprom_write(uint32_t addr, const uint8_t *data, uint32_t count);
uint8_t spi_eeprom_read_status_reg(void);
#endif /* __SETTINGS_SPI_EEPROM_H__ */

115
stm-firmware/settings/spi-eeprom.c Normal file
View File

@ -0,0 +1,115 @@
/* Reflow Oven Controller
*
* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
*
* This file is part of the Reflow Oven Controller Project.
*
* The reflow oven controller is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with the reflow oven controller project.
* If not, see <http://www.gnu.org/licenses/>.
*/
#include <reflow-controller/settings/spi-eeprom.h>
#include <stm-periph/spi.h>
#include <reflow-controller/periph-config/spi-eeprom-hwcfg.h>
#include <stm-periph/rcc-manager.h>
#include <stm-periph/stm32-gpio-macros.h>
#define EEPROM_SIZE 0x200
#define EEPROM_PAGE_SIZE 16
static stm_spi_handle eeprom_spi_handle;
static void eeprom_cs_activate(void)
{
SPI_EEPROM_SPI_PORT->ODR &= ~(1<<SPI_EEPROM_CS_PIN);
}
static void eeprom_cs_deactivate(void)
{
SPI_EEPROM_SPI_PORT->ODR |= (1<<SPI_EEPROM_CS_PIN);
}
int spi_eeprom_init()
{
static struct stm_spi_dev spi_dev;
struct stm_spi_settings settings;
rcc_manager_enable_clock(&SPI_EEPROM_SPI_PORT_RCC_REG, BITMASK_TO_BITNO(SPI_EEPROM_SPI_PORT_RCC_MASK));
SPI_EEPROM_SPI_PORT->MODER &= MODER_DELETE(SPI_EEPROM_CS_PIN) & MODER_DELETE(SPI_EEPROM_MISO_PIN) &
MODER_DELETE(SPI_EEPROM_MOSI_PIN) & MODER_DELETE(SPI_EEPROM_SCK_PIN);
SPI_EEPROM_SPI_PORT->MODER |= ALTFUNC(SPI_EEPROM_MISO_PIN) | ALTFUNC(SPI_EEPROM_SCK_PIN) | ALTFUNC(SPI_EEPROM_MOSI_PIN);
SPI_EEPROM_SPI_PORT->MODER |= OUTPUT(SPI_EEPROM_CS_PIN);
SETAF(SPI_EEPROM_SPI_PORT, SPI_EEPROM_MISO_PIN, SPI_EEPROM_SPI_ALTFUNC_NO);
SETAF(SPI_EEPROM_SPI_PORT, SPI_EEPROM_MOSI_PIN, SPI_EEPROM_SPI_ALTFUNC_NO);
SETAF(SPI_EEPROM_SPI_PORT, SPI_EEPROM_SCK_PIN, SPI_EEPROM_SPI_ALTFUNC_NO);
eeprom_cs_deactivate();
settings.cpha = false;
settings.cpol = false;
settings.cs_activate = eeprom_cs_activate;
settings.cs_deactivate = eeprom_cs_deactivate;
settings.master = true;
settings.msb_first = true;
settings.prescaler = SPI_PRSC_DIV64;
eeprom_spi_handle = spi_init(&spi_dev, SPI1, &settings);
if (eeprom_spi_handle)
return 0;
else
return -1;
}
void spi_eeprom_deinit()
{
spi_deinit(eeprom_spi_handle);
SPI_EEPROM_SPI_PORT->MODER &= MODER_DELETE(SPI_EEPROM_CS_PIN) & MODER_DELETE(SPI_EEPROM_MISO_PIN) &
MODER_DELETE(SPI_EEPROM_MOSI_PIN) & MODER_DELETE(SPI_EEPROM_SCK_PIN);
rcc_manager_disable_clock(&SPI_EEPROM_SPI_PORT_RCC_REG, BITMASK_TO_BITNO(SPI_EEPROM_SPI_PORT_RCC_MASK));
}
uint8_t spi_eeprom_read_status_reg(void)
{
uint8_t buff[2] = {0x05, 0x00};
(void)spi_transfer(eeprom_spi_handle, buff, buff, 2, true);
return buff[1];
}
int spi_eeprom_read(uint32_t addr, uint8_t *rx_buff, uint32_t count)
{
int ret = 0;
if (!rx_buff || !count)
return -1000;
if (addr >= EEPROM_SIZE)
return -1001;
eeprom_cs_activate();
eeprom_cs_deactivate();
return ret;
}
int spi_eeprom_write(uint32_t addr, const uint8_t *data, uint32_t count);