Start RAM code for updater
This commit is contained in:
@@ -123,13 +123,17 @@ debug:
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%.hex: %.elf
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$(QUIET)$(OBJCOPY) -O ihex $^ $@
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#Linking
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$(target).elf: $(OBJ) $(ASOBJ) $(LINKER_SCRIPT)
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$(target).elf: $(OBJ) $(ASOBJ) $(LINKER_SCRIPT) updater/ram-code/updater-ram-code.bin.c
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@echo [LD] $@
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$(QUIET)$(CC) $(LFLAGS) $(LIBRARYPATH) -o $@ $(OBJ) $(ASOBJ) $(LIBRARIES)
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$(QUIET)$(SIZE) $@
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@echo "Built Version $(GIT_VER)"
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updater/ram-code/updater-ram-code.bin.c:
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$(QUIET)$(MAKE) -C updater/ram-code updater-ram-code.bin.c
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#Compiling
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$(OBJ):
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@echo [CC] $@
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@@ -177,6 +181,7 @@ else
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endif
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$(QUIET)rm -f $(target).elf $(target).bin $(target).hex $(OBJ) $(ASOBJ) $(mapfile).map $(CFILES:%.c=$(OBJDIR)/%.c.d) $(ASFILES:%.S=$(OBJDIR)/%.S.d)
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$(QUIET)rm -rf $(OBJDIR)/*
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$(MAKE) -C updater/ram-code clean
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ifneq ($(DEBUGBUILD),true)
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$(QUIET)$(MAKE) DEBUGBUILD=true clean
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endif
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@@ -20,7 +20,7 @@
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* RAM: 128K
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* CCM RAM: 64L
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* FPU: fpv4-sp-d16
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*
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*/
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/* USER PARAMETERS */
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__ld_stack_size = 0x3000;
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5
stm-firmware/updater/ram-code/.gitignore
vendored
Normal file
5
stm-firmware/updater/ram-code/.gitignore
vendored
Normal file
@@ -0,0 +1,5 @@
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obj/*
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*.bin
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*.bin.c
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*.elf
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*.map
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62
stm-firmware/updater/ram-code/Makefile
Normal file
62
stm-firmware/updater/ram-code/Makefile
Normal file
@@ -0,0 +1,62 @@
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RAM_CODE_TARGET = updater-ram-code
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OBJDIR = obj
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CFILES = main.c startup.c
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LINKER_SCRIPT = ram-link.ld
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MAPFILE = $(RAM_CODE_TARGET)
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PREFIX = arm-none-eabi-
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CC = $(PREFIX)gcc
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OBJCOPY = $(PREFIX)objcopy
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SIZE = $(PREFIX)size
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ifneq ($(VERBOSE),true)
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QUIET=@
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else
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QUIET=
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endif
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DEFINES =
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INCLUDEPATH =
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LFLAGS = -mlittle-endian -mthumb -mcpu=cortex-m4 -mthumb-interwork
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LFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 --disable-newlib-supplied-syscalls -nostartfiles
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LFLAGS += -T$(LINKER_SCRIPT) -Wl,-Map=$(MAPFILE).map -Wl,--print-memory-usage
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CFLAGS = -c -mlittle-endian -mthumb -mcpu=cortex-m4 -mthumb-interwork -O0
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CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 -nostartfiles
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CFLAGS += -Wall -Wextra -Wold-style-declaration -Wuninitialized -Wmaybe-uninitialized -Wunused-parameter -Wimplicit-fallthrough=3 -Wsign-compare
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OBJ = $(CFILES:%.c=$(OBJDIR)/%.c.o)
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default: $(RAM_CODE_TARGET).bin.c
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all: $(RAM_CODE_TARGET).bin.c
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%.bin.c: %.bin
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@echo "[BIN2C] $@"
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$(QUIET)python bin2carray.py $@ $^
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$(RAM_CODE_TARGET).bin: $(RAM_CODE_TARGET).elf
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@echo "[ELF2BIN] $@"
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$(QUIET)$(OBJCOPY) -O binary $^ $@
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$(RAM_CODE_TARGET).elf: $(OBJ) $(LINKER_SCRIPT)
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@echo [LD] $@
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$(QUIET)$(CC) $(LFLAGS) $(LIBRARYPATH) -o $@ $(OBJ) $(ASOBJ) $(LIBRARIES)
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$(QUIET)$(SIZE) $@
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$(OBJ):
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@echo [CC] $@
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$(eval OUTPATH=$(dir $@))
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@mkdir -p $(OUTPATH)
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$(QUIET)$(CC) $(CFLAGS) -MMD -MT $@ $(INCLUDEPATH) $(DEFINES) -o $@ $(@:$(OBJDIR)/%.c.o=%.c)
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.PHONY: clean
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clean:
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@echo [CLEAN]
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rm -f $(OBJ) $(MAPFILE).map $(CFILES:%.c=$(OBJDIR)/%.c.d) $(RAM_CODE_TARGET).bin $(RAM_CODE_TARGET).elf $(RAM_CODE_TARGET).bin.c
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-include $(CFILES:%.c=$(OBJDIR)/%.c.d)
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17
stm-firmware/updater/ram-code/bin2carray.py
Executable file
17
stm-firmware/updater/ram-code/bin2carray.py
Executable file
@@ -0,0 +1,17 @@
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#!env python
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import os
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import sys
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if len(sys.argv) < 3:
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sys.exit(-1)
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source_file = sys.argv[2]
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dest_file = sys.argv[1]
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print("%s --> %s" % (source_file, dest_file))
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with open(dest_file, "w") as f:
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f.write("AAA")
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sys.exit(0)
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6
stm-firmware/updater/ram-code/main.c
Normal file
6
stm-firmware/updater/ram-code/main.c
Normal file
@@ -0,0 +1,6 @@
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#include <stdint.h>
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int ram_code_main(void)
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{
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return 0;
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}
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79
stm-firmware/updater/ram-code/ram-link.ld
Normal file
79
stm-firmware/updater/ram-code/ram-link.ld
Normal file
@@ -0,0 +1,79 @@
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/*
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* STM32F407VE Linkerscript for updater RAM code execution
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* Copyright (C) 2020 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of 'Shimatta Reflow Controller'.
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*
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* It is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 2 of the License.
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||||
*
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||||
* This code is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this template. If not, see <http://www.gnu.org/licenses/>.
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* --------------------------------------------------------------------
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* FLASH: 512K
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* RAM: 128K
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* CCM RAM: 64L
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* FPU: fpv4-sp-d16
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*/
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ENTRY(Reset_Handler)
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__ld_top_of_stack = 0x20020000; /* One byte above the end of the SRAM. Stack is pre-decrewmenting, so this is okay */
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/* Available memory areas */
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MEMORY
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{
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FLASH (xr) : ORIGIN = 0x08000000, LENGTH = 512K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
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CCM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
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}
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SECTIONS
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{
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.vectors :
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{
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. = ALIGN(4);
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__ld_vector_start = .;
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KEEP(*(.vectors));
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. = ALIGN(4);
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} > RAM
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP(*(.init)) /* Constructors */
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KEEP(*(.fini)) /* Destructors */
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} > RAM
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.data :
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{
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. = ALIGN(4);
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*(.data)
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*(.data*)
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. = ALIGN(4);
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} > RAM
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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__ld_sbss = .;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__ld_ebss = .;
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} > RAM
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}
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294
stm-firmware/updater/ram-code/startup.c
Normal file
294
stm-firmware/updater/ram-code/startup.c
Normal file
@@ -0,0 +1,294 @@
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/*
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* STM32F4 Startup Code for STM32F407 devices
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* Copyright (C) 2017 Mario Hüttel <mario.huettel@gmx.net>
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*
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||||
* This file is part of 'STM32F4 code template'.
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||||
*
|
||||
* It is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, version 2 of the License.
|
||||
*
|
||||
* This code is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this template. If not, see <http://www.gnu.org/licenses/>.
|
||||
* ------------------------------------------------------------------------
|
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*/
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||||
#include <stdint.h>
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/* C++ library init */
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# if defined(__cplusplus)
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||||
extern "C" {
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extern void __libc_init_array(void);
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}
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#endif
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/* Defines for weak default handlers */
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#define WEAK __attribute__((weak))
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#define ALIAS(func) __attribute__ ((weak, alias (#func)))
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||||
/* Define for section mapping */
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#define SECTION(sec) __attribute__((section(sec)))
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/* Handler prototypes */
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#if defined(_cplusplus)
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extern "C" {
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#endif
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/* Interrupt Defualt handler */
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WEAK void __int_default_handler(void);
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/* Core Interrupts */
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||||
void Reset_Handler(void);
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void NMI_Handler(void) ALIAS(__int_default_handler);
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void HardFault_Handler(void) ALIAS(__int_default_handler);
|
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void MemManage_Handler(void) ALIAS(__int_default_handler);
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void BusFault_Handler(void) ALIAS(__int_default_handler);
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void UsageFault_Handler(void) ALIAS(__int_default_handler);
|
||||
void SVC_Handler(void) ALIAS(__int_default_handler);
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||||
void DebugMon_Handler(void) ALIAS(__int_default_handler);
|
||||
void PendSV_Handler(void) ALIAS(__int_default_handler);
|
||||
void SysTick_Handler(void) ALIAS(__int_default_handler);
|
||||
|
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/* Peripheral Interrupts (by default mapped onto Default Handler) */
|
||||
void WWDG_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void PVD_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TAMP_STAMP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void RTC_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void FLASH_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void RCC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream6_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void ADC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_TX_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_RX0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_RX1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_SCE_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI9_5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_BRK_TIM9_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_UP_TIM10_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_TRG_COM_TIM11_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_CC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C1_EV_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C1_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C2_EV_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C2_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI15_10_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void RTC_Alarm_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_FS_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_BRK_TIM12_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_UP_TIM13_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_TRG_COM_TIM14_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_CC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream7_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void FSMC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SDIO_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void UART4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void UART5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM6_DAC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM7_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void ETH_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void ETH_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_TX_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_RX0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_RX1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_SCE_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_FS_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream6_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream7_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART6_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C3_EV_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C3_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_EP1_OUT_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_EP1_IN_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DCMI_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CRYP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void HASH_RNG_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void FPU_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
|
||||
extern int ram_code_main(void);
|
||||
extern void SystemInit(void);
|
||||
|
||||
extern void __ld_top_of_stack(void);
|
||||
#if defined(_cplusplus)
|
||||
extern "C" }
|
||||
#endif
|
||||
|
||||
void (* const vector_table[])(void) SECTION(".vectors") = {
|
||||
&__ld_top_of_stack,
|
||||
/* Core Interrupts */
|
||||
Reset_Handler,
|
||||
NMI_Handler,
|
||||
HardFault_Handler,
|
||||
MemManage_Handler,
|
||||
BusFault_Handler,
|
||||
UsageFault_Handler,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
SVC_Handler,
|
||||
DebugMon_Handler,
|
||||
0,
|
||||
PendSV_Handler,
|
||||
SysTick_Handler,
|
||||
/* Peripheral Interrupts */
|
||||
WWDG_IRQHandler,
|
||||
PVD_IRQHandler,
|
||||
TAMP_STAMP_IRQHandler,
|
||||
RTC_WKUP_IRQHandler,
|
||||
FLASH_IRQHandler,
|
||||
RCC_IRQHandler,
|
||||
EXTI0_IRQHandler,
|
||||
EXTI1_IRQHandler,
|
||||
EXTI2_IRQHandler,
|
||||
EXTI3_IRQHandler,
|
||||
EXTI4_IRQHandler,
|
||||
DMA1_Stream0_IRQHandler,
|
||||
DMA1_Stream1_IRQHandler,
|
||||
DMA1_Stream2_IRQHandler,
|
||||
DMA1_Stream3_IRQHandler,
|
||||
DMA1_Stream4_IRQHandler,
|
||||
DMA1_Stream5_IRQHandler,
|
||||
DMA1_Stream6_IRQHandler,
|
||||
ADC_IRQHandler,
|
||||
CAN1_TX_IRQHandler,
|
||||
CAN1_RX0_IRQHandler,
|
||||
CAN1_RX1_IRQHandler,
|
||||
CAN1_SCE_IRQHandler,
|
||||
EXTI9_5_IRQHandler,
|
||||
TIM1_BRK_TIM9_IRQHandler,
|
||||
TIM1_UP_TIM10_IRQHandler,
|
||||
TIM1_TRG_COM_TIM11_IRQHandler,
|
||||
TIM1_CC_IRQHandler,
|
||||
TIM2_IRQHandler,
|
||||
TIM3_IRQHandler,
|
||||
TIM4_IRQHandler,
|
||||
I2C1_EV_IRQHandler,
|
||||
I2C1_ER_IRQHandler,
|
||||
I2C2_EV_IRQHandler,
|
||||
I2C2_ER_IRQHandler,
|
||||
SPI1_IRQHandler,
|
||||
SPI2_IRQHandler,
|
||||
USART1_IRQHandler,
|
||||
USART2_IRQHandler,
|
||||
USART3_IRQHandler,
|
||||
EXTI15_10_IRQHandler,
|
||||
RTC_Alarm_IRQHandler,
|
||||
OTG_FS_WKUP_IRQHandler,
|
||||
TIM8_BRK_TIM12_IRQHandler,
|
||||
TIM8_UP_TIM13_IRQHandler,
|
||||
TIM8_TRG_COM_TIM14_IRQHandler,
|
||||
TIM8_CC_IRQHandler,
|
||||
DMA1_Stream7_IRQHandler,
|
||||
FSMC_IRQHandler,
|
||||
SDIO_IRQHandler,
|
||||
TIM5_IRQHandler,
|
||||
SPI3_IRQHandler,
|
||||
UART4_IRQHandler,
|
||||
UART5_IRQHandler,
|
||||
TIM6_DAC_IRQHandler,
|
||||
TIM7_IRQHandler,
|
||||
DMA2_Stream0_IRQHandler,
|
||||
DMA2_Stream1_IRQHandler,
|
||||
DMA2_Stream2_IRQHandler,
|
||||
DMA2_Stream3_IRQHandler,
|
||||
DMA2_Stream4_IRQHandler,
|
||||
ETH_IRQHandler,
|
||||
ETH_WKUP_IRQHandler,
|
||||
CAN2_TX_IRQHandler,
|
||||
CAN2_RX0_IRQHandler,
|
||||
CAN2_RX1_IRQHandler,
|
||||
CAN2_SCE_IRQHandler,
|
||||
OTG_FS_IRQHandler,
|
||||
DMA2_Stream5_IRQHandler,
|
||||
DMA2_Stream6_IRQHandler,
|
||||
DMA2_Stream7_IRQHandler,
|
||||
USART6_IRQHandler,
|
||||
I2C3_EV_IRQHandler,
|
||||
I2C3_ER_IRQHandler,
|
||||
OTG_HS_EP1_OUT_IRQHandler,
|
||||
OTG_HS_EP1_IN_IRQHandler,
|
||||
OTG_HS_WKUP_IRQHandler,
|
||||
OTG_HS_IRQHandler,
|
||||
DCMI_IRQHandler,
|
||||
CRYP_IRQHandler,
|
||||
HASH_RNG_IRQHandler,
|
||||
FPU_IRQHandler
|
||||
};
|
||||
|
||||
static void __fill_zero(unsigned int *start, unsigned int *end) {
|
||||
while ((unsigned int) start < (unsigned int)end) {
|
||||
*(start++) = 0x00000000;
|
||||
}
|
||||
}
|
||||
|
||||
extern unsigned int __ld_vector_start;
|
||||
extern unsigned int __ld_sbss;
|
||||
extern unsigned int __ld_ebss;
|
||||
|
||||
|
||||
#ifdef CPACR
|
||||
#undef CPACR
|
||||
#endif
|
||||
|
||||
#define CPACR (*((volatile uint32_t *)0xE000ED88))
|
||||
|
||||
void Reset_Handler(void) {
|
||||
/* Stack is already initialized by hardware */
|
||||
|
||||
/* The first thing we do here, is to initialize the FPU
|
||||
* When this code is compiled optimized with hardfpu abi,
|
||||
* GCC tends to generate FPU instructions for data copying
|
||||
*/
|
||||
CPACR |= (0xF << 20);
|
||||
/* Reset the stack pointer to top of stack. SP is not required to be inside the clobber list! */
|
||||
__asm__ __volatile__ ("mov sp, %0\n\t" :: "r"(&__ld_top_of_stack) :);
|
||||
|
||||
/* Fill bss with zero */
|
||||
__fill_zero(&__ld_sbss, &__ld_ebss);
|
||||
/* Fill Heap with zero */
|
||||
|
||||
ram_code_main();
|
||||
|
||||
/* Catch return from main() */
|
||||
while(1);
|
||||
}
|
||||
|
||||
WEAK void __int_default_handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
Reference in New Issue
Block a user