Start documentation for safety RAM. Will be implemented afterwards
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doc/source/firmware/backup-ram.rst
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doc/source/firmware/backup-ram.rst
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.. _backup_ram:
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Safety Backup RAM
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=================
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Overview
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--------
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The STM controller's backup RAM is used to store different kinds of information that shall be preserved if the controller resets.
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The hardware setup is missing a separate powersupply for the controller's backup domain. Therefore, the backup RAM is cleared, when the power is cut.
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The backup RAM is used to store permanent error flags (See :ref:`safety_flags`). This ensures the flags stay present, even if a system reset is performed. The only way to clear them is by cutting the power.
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Because cutting the power is a way to clear the backup RAM, no separate method for clearing the error entries in the backup RAM is defined.
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The backup RAM contents are protected by a `CRC Checksum`_.
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The backup RAM is initialized and checked after boot. If the controller starts from a powered down state,
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the backup RAM is empty. This is detected by an invalid `Header`_ at the beginning of the backup RAM. If this is the case, the safety ocntoller
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will create a valid backup RAM image with a `Header`_, empty `Status Flag Entries`_, an empty `Error Memory`_, and a valid `CRC Checksum`_.
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If the Header is valid during boot (verified by plausible values and correct magic numbers), the backup RAM is CRC checked.
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In case of a CRC error, the Backup RAM is wiped and reinitialized. On top of that, the error flag :ref:`safety_flags_safety_mem_corrupt` is set.
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.. note:: It may be possible that future versions of the hardware include a backup RAM battery / Goldcap. In this case, a way to clear the error memory will be implemented,
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because it will no longer be possible to clear the error memory by cutting the power.
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On top of that, the backup memory will also contain the calibration data.
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Partitioning and Entries
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------------------------
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The backup RAM consists of multiple sections. The memory section are listed below.
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Header
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~~~~~~
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The backup memory header is located at offset address:
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.. doxygendefine:: SAFETY_MEMORY_HEADER_ADDRESS
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The header is defined by the following structure:
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.. doxygenstruct:: safety_memory_header
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The validity of the header is checked, if the magic and inverse amgic fields contain the correct values, and if the offset address pointers
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have values that are located inside the error memory and are not ``0`` or the same value.
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The safety memory header magic is:
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.. doxygendefine:: SAFETY_MEMORY_MAGIC
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Status Flag Entries
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~~~~~~~~~~~~~~~~~~~
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Error Memory
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~~~~~~~~~~~~
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CRC Checksum
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~~~~~~~~~~~~
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@@ -6,4 +6,15 @@ Error Handling
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.. _safety_panic:
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Panic Mode
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----------
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----------
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.. _safety_error_mem:
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Error memory
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------------
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Permanent errors are stored in the backup RAM of the STM. This ensures, that errors can be read even after a full system reset has occured.
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.. seealso:: :ref:`backup_ram`
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@@ -72,4 +72,22 @@ ERR_FLAG_MEAS_ADC_UNSTABLE
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persistent self-clearing Stops PID Panic Mode
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========== ============= ============= ===========
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no yes no no
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========== ============= ============= ===========
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.. _safety_flags_safety_mem_corrupt:
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ERR_FLAG_SAFETY_MEM_CORRUPT
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---------------------------
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``ERR_FLAG_SAFETY_MEM_CORRUPT`` is set during the initialization of the controller, in case a corrupted safety memory is encountered.
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In this case the error memory is reinitialized and the flag is set in the error memory. Afer a reboot it will stay asserted until the
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safety backup memory is cleared
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.. seealso:: :ref:`backup_ram`
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========== ============= ============= ===========
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persistent self-clearing Stops PID Panic Mode
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========== ============= ============= ===========
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yes no yes no
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========== ============= ============= ===========
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@@ -16,4 +16,5 @@ which forces the output zero, but does not allow any more interaction.
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:maxdepth: 2
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flags
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backup-ram
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error-handling
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