Remove toml. Write calibration to dat files. Implement first draft for reading function
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@@ -710,21 +710,16 @@ DRESULT sdio_disk_write(const BYTE *buff, DWORD sector, UINT count)
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addr = (card_info.type == SD_V2_HC ? (sector) : (sector * 512));
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while (count) {
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do {
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ret = sdio_check_status_register_cmd13(card_info.rca, &status.value);
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} while (status.statusstruct.CURRENT_STATE == CURRENT_STATE_PRG ||
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status.statusstruct.CURRENT_STATE == CURRENT_STATE_RCV ||
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ret);
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ret = sdio_check_status_register_cmd13(card_info.rca, &status.value);
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if (ret)
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return RES_ERROR;
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if (status.statusstruct.CURRENT_STATE == CURRENT_STATE_STBY) {
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if (sdio_send_select_card_cmd7(card_info.rca))
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return RES_ERROR;
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}
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do {
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sdio_check_status_register_cmd13(card_info.rca, &status.value);
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} while (status.statusstruct.READY_FOR_DATA != 1);
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ret = sdio_send_write_block_cmd24(addr);
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if (ret) {
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return RES_ERROR;
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@@ -12,9 +12,9 @@
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//4 bit: 4
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#define BUSWIDTH 4 //4
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//Initial Transfer CLK (ca. 400kHz)
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#define INITCLK 130 //120
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#define INITCLK 140 //120
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//Working CLK (Maximum)
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#define WORKCLK 50 //0
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#define WORKCLK 45 //0
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//Data Timeout in CLK Cycles
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#define DTIMEOUT 0x3000 //150
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//DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
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