127 lines
3.2 KiB
C
127 lines
3.2 KiB
C
/* Reflow Oven Controller
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*
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* Copyright (C) 2020 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @addtogroup watchdog
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* @{
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*/
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#include <reflow-controller/safety/watchdog.h>
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#include <stm32/stm32f4xx.h>
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/**
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* @brief This key is expected by hardware to be written to the IWDG_KR register in order to reset the watchdog
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*/
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#define STM32_WATCHDOG_RESET_KEY 0xAAAA
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/**
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* @brief This key is expected by hardware to be written to the IWDG_KR register in order to enable the watchdog
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*/
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#define STM32_WATCHDOG_ENABLE_KEY 0xCCCC
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/**
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* @brief This key is expected by hardware to be written to the IWDG_KR register in order to enable access to config
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* registers
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*/
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#define STM32_WATCHDOG_REGISTER_ACCESS_KEY 0x5555
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int watchdog_setup(uint16_t prescaler, uint16_t reload_value)
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{
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uint32_t prescaler_reg_val;
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int ret = 0;
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/** - Activate the LSI oscillator */
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RCC->CSR |= RCC_CSR_LSION;
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__DSB();
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/** - Wait for the oscillator to be ready */
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while (!(RCC->CSR & RCC_CSR_LSIRDY))
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;
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if (prescaler == 4U) {
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prescaler_reg_val = 0UL;
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} else if (prescaler == 8U) {
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prescaler_reg_val = 1UL;
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} else if (prescaler == 16U) {
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prescaler_reg_val = 2UL;
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} else if (prescaler == 32U) {
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prescaler_reg_val = 3UL;
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} else if (prescaler == 64U) {
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prescaler_reg_val = 4UL;
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} else if (prescaler == 128U) {
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prescaler_reg_val = 5UL;
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} else if (prescaler == 256U) {
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prescaler_reg_val = 6UL;
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} else {
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prescaler_reg_val = 6UL;
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ret = -1;
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}
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/** - (De)activate the watchdog during debug access according to @ref WATCHDOG_HALT_DEBUG */
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if (WATCHDOG_HALT_DEBUG)
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DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_IWDG_STOP;
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else
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DBGMCU->APB1FZ &= ~DBGMCU_APB1_FZ_DBG_IWDG_STOP;
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/** - Unlock registers */
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IWDG->KR = STM32_WATCHDOG_REGISTER_ACCESS_KEY;
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/** - Wait until prescaler can be written */
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while (IWDG->SR & IWDG_SR_PVU)
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;
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/** - Write prescaler value */
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IWDG->PR = prescaler_reg_val;
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/* - Wait until reload value can be written */
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while (IWDG->SR & IWDG_SR_RVU)
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;
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/** - Set reload value */
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if (reload_value > 0xFFFu) {
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reload_value = 0xFFFFu;
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ret = -2;
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}
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IWDG->RLR = reload_value;
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/** - Write enable key */
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IWDG->KR = STM32_WATCHDOG_ENABLE_KEY;
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/** - Do a first reset of the counter. This also locks the config regs */
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watchdog_ack(WATCHDOG_MAGIC_KEY);
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return ret;
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}
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int watchdog_ack(uint32_t magic)
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{
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int ret = -1;
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/** - Check if magic key is correct */
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if (magic == WATCHDOG_MAGIC_KEY) {
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/** - Write reset key to watchdog */
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IWDG->KR = STM32_WATCHDOG_RESET_KEY;
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ret = 0;
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}
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return ret;
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}
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/** @} */
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