165 lines
4.0 KiB
C
165 lines
4.0 KiB
C
/* Reflow Oven Controller
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*
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* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stm-periph/spi.h>
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#include <helper-macros/helper-macros.h>
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#include <stm-periph/rcc-manager.h>
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#include <string.h>
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#define STM_SPI_DEV_MAGIC 0x5A678F5CUL
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struct spi_rcc_lookup_pair {
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SPI_TypeDef *spi_regs;
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volatile uint32_t *rcc_reg;
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uint32_t bit_no;
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};
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const struct spi_rcc_lookup_pair rcc_lookup[3] = {
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{SPI1, &RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_SPI1EN)},
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{SPI2, &RCC->APB1ENR, BITMASK_TO_BITNO(RCC_APB1ENR_SPI2EN)},
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{SPI3, &RCC->APB1ENR, BITMASK_TO_BITNO(RCC_APB1ENR_SPI3EN)},
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};
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static const struct spi_rcc_lookup_pair *spi_find_rcc_reg_and_bit(SPI_TypeDef *spi_regs)
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{
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uint32_t i;
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const struct spi_rcc_lookup_pair *ret = NULL;
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for (i = 0; i < COUNT_OF(rcc_lookup); i++) {
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if (rcc_lookup[i].spi_regs == spi_regs) {
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ret = &rcc_lookup[i];
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break;
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}
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}
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return ret;
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}
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static struct stm_spi_dev *spi_handle_to_struct(stm_spi_handle handle)
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{
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struct stm_spi_dev *dev;
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dev = (struct stm_spi_dev *)handle;
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if (dev == NULL)
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return NULL;
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if (dev->magic != STM_SPI_DEV_MAGIC)
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return NULL;
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return dev;
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}
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stm_spi_handle spi_init(struct stm_spi_dev *spi_dev_struct, SPI_TypeDef *spi_regs, const struct stm_spi_settings *settings)
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{
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stm_spi_handle ret_handle = NULL;
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uint32_t reg_val;
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const struct spi_rcc_lookup_pair *rcc_pair;
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if (!spi_dev_struct || !spi_regs || !settings)
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goto exit;
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if (!settings->cs_activate || !settings->cs_deactivate)
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goto exit;
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rcc_pair = spi_find_rcc_reg_and_bit(spi_regs);
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if (!rcc_pair)
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goto exit;
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memcpy(&spi_dev_struct->settings, settings, sizeof(struct stm_spi_settings));
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spi_dev_struct->spi_regs = spi_regs;
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rcc_manager_enable_clock(rcc_pair->rcc_reg, rcc_pair->bit_no);
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reg_val = 0;
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if (settings->cpha)
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reg_val |= SPI_CR1_CPHA;
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if (settings->cpol)
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reg_val |= SPI_CR1_CPOL;
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if (settings->master)
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reg_val |= SPI_CR1_MSTR;
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reg_val |= (settings->prescaler & 0x7) << 3;
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reg_val |= SPI_CR1_SPE | SPI_CR1_SSI | SPI_CR1_SSM;
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if (!settings->msb_first)
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reg_val |= SPI_CR1_LSBFIRST;
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spi_regs->CR2 = 0UL;
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spi_regs->CR1 = reg_val;
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ret_handle = spi_dev_struct;
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spi_dev_struct->settings.cs_deactivate();
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exit:
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return ret_handle;
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}
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void spi_deinit(stm_spi_handle handle)
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{
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const struct spi_rcc_lookup_pair *rcc_pair;
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struct stm_spi_dev *dev;
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dev = spi_handle_to_struct(handle);
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if (!dev)
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return;
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dev->spi_regs->CR1 = 0;
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dev->spi_regs->CR2 = 0;
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rcc_pair = spi_find_rcc_reg_and_bit(dev->spi_regs);
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if (!rcc_pair)
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rcc_manager_disable_clock(rcc_pair->rcc_reg, rcc_pair->bit_no);
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}
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static uint8_t transfer_byte(uint8_t byte, struct stm_spi_dev *dev)
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{
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while (dev->spi_regs->SR & SPI_SR_BSY);
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dev->spi_regs->DR = (uint16_t)byte;
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__DSB();
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while((dev->spi_regs->SR & SPI_SR_BSY) || !(dev->spi_regs->SR & SPI_SR_TXE));
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return (uint8_t)dev->spi_regs->DR;
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}
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int spi_transfer(stm_spi_handle handle, const uint8_t *tx, uint8_t *rx, uint32_t count, bool handle_cs)
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{
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struct stm_spi_dev *dev;
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uint8_t tx_byte;
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uint8_t rx_byte;
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uint32_t idx;
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dev = spi_handle_to_struct(handle);
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if (!dev)
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return -1001;
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if (handle_cs)
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dev->settings.cs_activate();
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for (idx = 0; idx < count; idx++) {
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tx_byte = (tx ? tx[idx] : 0U);
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rx_byte = transfer_byte(tx_byte, dev);
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if (rx)
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rx[idx] = rx_byte;
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}
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if (handle_cs)
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dev->settings.cs_deactivate();
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return 0;
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}
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