89 lines
3.3 KiB
C
89 lines
3.3 KiB
C
/* Reflow Oven Controller
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*
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* Copyright (C) 2020 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* GDSII-Converter is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __RCC_MANAGER_H__
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#define __RCC_MANAGER_H__
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#include <stdint.h>
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#include <stm-periph/stm32-gpio-macros.h>
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#include <stdbool.h>
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/**
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* @brief The RCC Enable Manager uses static memory with a fixed maximum
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*/
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#define RCC_ENABLE_MANAGER_STATIC 1U
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#if RCC_ENABLE_MANAGER_STATIC
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#define RCC_ENABLE_MANAGER_COUNT 30U
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#else
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#error "RCC Enable Manager not yet implemented with dynamic memory"
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#endif
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/**
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* @brief The source/cause of a system reset. The values can be or'ed together as multiple flags may be possible at the same time.
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*/
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enum rcc_reset_source {
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RCC_RESET_SOURCE_LOW_POWER = (1<<0), /**< @brief System reset caused by low power reset */
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RCC_RESET_SOURCE_SOFTWARE = (1<<1), /**< @brief System reset caused by software */
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RCC_RESET_SOURCE_WWD = (1<<2), /**< @brief System reset caused by window watchdog */
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RCC_RESET_SOURCE_IWDG = (1<<3), /**< @brief System reset caused by independent watchdog */
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RCC_RESET_SOURCE_POWER_ON = (1<<4), /**< @brief System reset caused by power on reset (POR) */
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RCC_RESET_SOURCE_PIN = (1<<5), /**< @brief System reset caused by NRST pin */
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RCC_RESET_BOR_POR = (1<<6), /**< @brief System reset caused by eitehr brown out or POR */
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};
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/**
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* @brief Enable Clock for peripheral by setting the corresponding bit (@p bit_no) to one
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*
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* This function also keeps a enable count on each bit that is set, in order to allow nested enables/disables
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*
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* If there is no more space to track a new register bit in memory (either due to the static limit or due to no remaining heap space),
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* the function still enables the peripheral clock but does not track it and returns -1
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*
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* @param rcc_enable_register
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* @param bit_no
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*
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* @return 0 if successful
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*/
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int rcc_manager_enable_clock(volatile uint32_t *rcc_enable_register, uint8_t bit_no);
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/**
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* @brief Disable clock for peripheral and decrement the enaböe-counter of that bit.
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*
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* If there is no bit entry in the counting table yet, teh peripheral clock is not disabled and error code
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* -1 is returned.
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*
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* If the count reaches zero, the element is removed from the list to make room for new ones
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*
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* @param rcc_enable_register Register to disable the bit in
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* @param bit_no Bit number (0 to 31) of the bit to disable
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* @return 0 if successful
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*/
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int rcc_manager_disable_clock(volatile uint32_t *rcc_enable_register, uint8_t bit_no);
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/**
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* @brief Get the causes of the last system reset.
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* @param clear_flags Clear the reset cause
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* @return Reset cause
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*/
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enum rcc_reset_source rcc_manager_get_reset_cause(bool clear_flags);
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#endif /* __RCC_MANAGER_H__ */
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