131 lines
3.5 KiB
C
131 lines
3.5 KiB
C
/* Reflow Oven Controller
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*
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* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <reflow-controller/ui/shell-uart.h>
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#include <reflow-controller/periph-config/shell-uart-config.h>
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#include <stm-periph/stm32-gpio-macros.h>
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#include <stm-periph/uart.h>
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#include <helper-macros/helper-macros.h>
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/**
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* @brief TX buffer for the shell's uart
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*/
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static char shell_uart_tx_buff[4096];
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/**
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* @brief RX buffer for the shell's uart
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*/
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static char shell_uart_rx_buff[128];
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/**
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* @brief The uart instance handling the shellmatta shell.
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*/
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struct stm_uart shell_uart;
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void shell_uart_setup(void)
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{
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struct stm_uart *uart = &shell_uart;
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uart->rx = 1;
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uart->tx = 1;
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uart->brr_val = SHELL_UART_DEFAULT_BRR_REG_VALUE;
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uart->rcc_reg = &SHELL_UART_RCC_REG;
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uart->rcc_bit_no = BITMASK_TO_BITNO(SHELL_UART_RCC_MASK);
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uart->uart_dev = SHELL_UART_PERIPH;
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uart->dma_rx_buff = shell_uart_rx_buff;
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uart->dma_tx_buff = shell_uart_tx_buff;
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uart->rx_buff_count = sizeof(shell_uart_rx_buff);
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uart->tx_buff_count = sizeof(shell_uart_tx_buff);
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uart->base_dma_num = 2;
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uart->dma_rx_stream = SHELL_UART_RECEIVE_DMA_STREAM;
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uart->dma_tx_stream = SHELL_UART_SEND_DMA_STREAM;
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uart->dma_rx_trigger_channel = SHELL_UART_RX_DMA_TRIGGER;
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uart->dma_tx_trigger_channel = SHELL_UART_TX_DMA_TRIGGER;
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uart_init(uart);
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NVIC_EnableIRQ(DMA2_Stream7_IRQn);
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}
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shellmatta_retCode_t shell_uart_write_callback(const char *data, uint32_t len)
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{
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uart_send_array_with_dma(&shell_uart, data, len);
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return SHELLMATTA_OK;
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}
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int shell_uart_receive_data_with_dma(const char **data, size_t *len)
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{
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return uart_receive_data_with_dma(&shell_uart, data, len);
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}
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int32_t shell_uart_reconfig_baud(uint32_t new_baud)
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{
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uint32_t brr_val_floor;
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uint32_t brr_val_remainder;
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uint32_t error_permille;
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int64_t actual_baud;
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/* Calculate the new BRR register value */
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brr_val_floor = SHELL_UART_PERIPHERAL_CLOCK / new_baud;
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brr_val_remainder = SHELL_UART_PERIPHERAL_CLOCK % new_baud;
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/* Round to the nearest value */
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if (brr_val_remainder > (new_baud / 2u)) {
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brr_val_floor++;
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brr_val_remainder = new_baud - brr_val_remainder;
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}
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actual_baud = (1000U *(int64_t)SHELL_UART_PERIPHERAL_CLOCK) / brr_val_floor;
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error_permille = (ABS(actual_baud - 1000U * (int64_t)new_baud)) / (int64_t)new_baud;
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if (error_permille < 20u) {
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uart_change_brr(&shell_uart, brr_val_floor);
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} else {
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return -1;
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}
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return (int32_t)error_permille;
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}
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uint32_t shell_uart_get_current_baudrate(void)
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{
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uint32_t brr;
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brr = uart_get_brr(&shell_uart);
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if (brr == 0)
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return 0;
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return (SHELL_UART_PERIPHERAL_CLOCK) / brr;
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}
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/**
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* @brief Handles the TX of UART1 (Shellmatta)
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*/
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void DMA2_Stream7_IRQHandler(void)
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{
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uint32_t hisr = DMA2->HISR & (0x3F << 22);
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DMA2->HIFCR = hisr;
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if (hisr & DMA_HISR_TCIF7)
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uart_tx_dma_complete_int_callback(&shell_uart);
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}
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