93 lines
2.5 KiB
C
93 lines
2.5 KiB
C
/* Reflow Oven Controller
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*
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* Copyright (C) 2021 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of the Reflow Oven Controller Project.
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*
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* The reflow oven controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The Reflow Oven Control Firmware is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the reflow oven controller project.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stm-periph/option-bytes.h>
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#include <stm32/stm32f4xx.h>
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/**
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* @brief First key for unlocking hte option byte write access
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*/
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#define FLASH_OPTION_KEY1 (0x08192A3BUL)
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/**
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* @brief Second key for unlocking hte option byte write access
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*/
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#define FLASH_OPTION_KEY2 (0x4C5D6E7FUL)
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void stm_option_bytes_read(struct option_bytes *opts)
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{
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uint32_t opt_reg;
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if (!opts)
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return;
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opt_reg = FLASH->OPTCR;
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opts->brown_out_level = (opt_reg & FLASH_OPTCR_BOR_LEV) >> 2;
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opts->nrst_standby = (opt_reg & FLASH_OPTCR_nRST_STDBY) >> 7;
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opts->nrst_stop = (opt_reg & FLASH_OPTCR_nRST_STOP) >> 6;
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opts->nwrpi = (opt_reg & FLASH_OPTCR_nWRP) >> 16;
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opts->read_protection = (opt_reg & FLASH_OPTCR_RDP) >> 8;
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opts->wdg_sw = (opt_reg & FLASH_OPTCR_WDG_SW) >> 5;
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}
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int stm_option_bytes_program(const struct option_bytes *opts)
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{
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uint32_t reg;
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FLASH->OPTKEYR = FLASH_OPTION_KEY1;
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FLASH->OPTKEYR = FLASH_OPTION_KEY2;
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__DSB();
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if (FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) {
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/* Unlocking failed */
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return -1;
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}
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reg = FLASH->OPTCR;
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reg &= ~FLASH_OPTCR_BOR_LEV;
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reg &= ~FLASH_OPTCR_nRST_STDBY;
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reg &= ~FLASH_OPTCR_nRST_STOP;
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reg &= ~FLASH_OPTCR_nWRP;
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reg &= ~FLASH_OPTCR_RDP;
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reg &= ~FLASH_OPTCR_WDG_SW;
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reg |= (opts->brown_out_level << 2) & FLASH_OPTCR_BOR_LEV;
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reg |= (opts->nrst_standby << 7) & FLASH_OPTCR_nRST_STDBY;
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reg |= (opts->nrst_stop << 6) & FLASH_OPTCR_nRST_STOP;
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reg |= (opts->nwrpi << 16) & FLASH_OPTCR_nWRP;
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reg |= (opts->read_protection << 8) & FLASH_OPTCR_RDP;
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reg |= (opts->wdg_sw << 5) & FLASH_OPTCR_WDG_SW;
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while (FLASH->SR & FLASH_SR_BSY)
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;
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FLASH->OPTCR = reg;
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FLASH->OPTCR |= FLASH_OPTCR_OPTSTRT;
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__DSB();
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while (FLASH->SR & FLASH_SR_BSY)
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;
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FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;
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__DSB();
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return 0;
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}
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