2015-04-30 11:59:37 +02:00
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/*
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* shimatta_sdio-driver.c
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*
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* Created on: Apr 30, 2015
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2015-10-13 18:39:29 +02:00
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* Mario Hüttel
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2015-04-30 11:59:37 +02:00
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*/
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#include <shimatta_sdio-driver.h>
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2015-10-13 18:39:29 +02:00
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#define SETAF(PORT,PIN,AF) PORT->AFR[(PIN < 8 ? 0 : 1)] |= AF << ((PIN < 8 ? PIN : (PIN - 8)) * 4)
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#define READCTRL ((BLOCKSIZE << 4) | SDIO_DCTRL_DMAEN)
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#define DMAP2M (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL)
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#define DMAM2P (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL | DMA_SxCR_DIR_0)
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#define SHORT_ANS 1
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#define LONG_ANS 3
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#define NO_ANS 0
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#define CCRCFAIL -1
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#define CTIMEOUT -2
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void SDIO_DMA_Init();
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void SDIO_InitModule();
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int SDIO_sendCmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns);
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int SDIO_getResp(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t* responseBuffer);
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int SDIO_parseR1Ans(uint32_t resp, StatusConv_t converter);
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int SDIO_send_ACMD41();
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int SDIO_send_CMD55();
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//BYTE rxtxbuffer[1<<BLOCKSIZE]; //Data RX and TX Buffer not needed anymore. thanks to DMA
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SDInfo_t cardInfo;
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2015-04-30 11:59:37 +02:00
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DSTATUS SDIO_status(){
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return 0;
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}
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DSTATUS SDIO_initialize(){
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2015-10-13 18:39:29 +02:00
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cardInfo.rca = 0;
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cardInfo.type = CARD_NONE;
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SDIO_DMA_Init();
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SDIO_InitModule();
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2015-04-30 11:59:37 +02:00
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return 0;
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}
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DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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return RES_OK;
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}
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2015-10-13 18:39:29 +02:00
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DRESULT SDIO_disk_write(const BYTE *buff, DWORD sector, UINT count){
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2015-04-30 11:59:37 +02:00
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return RES_OK;
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}
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DRESULT SDIO_disk_ioctl(BYTE cmd, void* buff){
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return RES_OK;
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}
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2015-05-02 11:17:35 +02:00
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DWORD __attribute__((weak)) get_fattime(){
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2015-04-30 11:59:37 +02:00
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return 0;
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}
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2015-10-13 18:39:29 +02:00
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void SDIO_DMA_Init(){
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RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN;
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DMASTREAM->CR = DMAM2P;
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//Address Conffiguration
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//Memory address is set by write and read block functions
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//DMASTREAM->M0AR = (uint32_t)&rxtxbuffer;
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DMASTREAM->PAR = (uint32_t)&SDIO->FIFO; //Not sure if this works
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//DMASTREAM->CR |= DMA_SxCR_EN;
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}
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void SDIO_InitModule(){
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//Init Clocks
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RCC->AHB1ENR |= PORTCLKMASK;
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RCC->APB2ENR |= RCC_APB2ENR_SDIOEN;
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//Init Alternate Functions
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CLKPORT->MODER |= (2<<CLKPIN*2);
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D0PORT->MODER |= (2<<D0PIN*2);
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#if BUSWIDTH==1
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D1PORT->MODER |= (2<<D1PIN*2);
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D2PORT->MODER |= (2<<D2PIN*2);
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D3PORT->MODER |= (2<<D3PIN*2);
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#endif
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//CLKPORT->AFR[(CLKPIN < 8 ? 0 : 1)] |= ALTFUNC << ((CLKPIN < 8 ? CLKPIN : (CLKPIN - 8)) * 4);
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SETAF(CLKPORT, CLKPIN, ALTFUNC);
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SETAF(D0PORT, D0PIN, ALTFUNC);
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#if BUSWIDTH==1
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SETAF(D1PORT, D1PIN, ALTFUNC);
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SETAF(D2PORT, D2PIN, ALTFUNC);
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SETAF(D3PORT, D3PIN, ALTFUNC);
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#endif
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//Init Module
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//Set CLK Control Register
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SDIO->CLKCR = (HW_FLOW<<14) | (BUSWIDTH<<11) | SDIO_CLKCR_CLKEN | (INITCLK & SDIO_CLKCR_CLKDIV);
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//Set Data Timeout
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SDIO->DTIMER = DTIMEOUT;
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//Set Data Parameters
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//SDIO->DCTRL = (BLOCKSIZE << 4) | SDIO_DCTRL_DMAEN;
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//Set Power Register: Power up Card CLK
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SDIO->POWER = SDIO_POWER_PWRCTRL_0 | SDIO_POWER_PWRCTRL_1;
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}
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int SDIO_parseR1Ans(uint32_t resp, StatusConv_t converter){
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statusConverter.value = resp;
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return 0;
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}
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//Send Command
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//Clear respone Flags
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//->CRC Fail, complete response, Timeout
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int SDIO_sendCmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns){
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//Clear Flags
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SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC;
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//Send command
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SDIO->ARG = arg;
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SDIO->CMD = (CMD & SDIO_CMD_CMDINDEX) | SDIO_CMD_CPSMEN | SDIO_CMD_WAITPEND | ((expectedAns << 6) & SDIO_CMD_WAITRESP);
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return 0;
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}
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int SDIO_getResp(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t *responseBuffer) {
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//Return with success because no data is needed
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if (typeOfAns == NO_ANS) return 0;
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//Wait for error or success
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while (1) {
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if (SDIO->STA & SDIO_STA_CMDREND) break; //Corrct Respone Received
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//Exclude 41 from valid CRC check
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if ((SDIO->STA & SDIO_STA_CCRCFAIL)) {
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if(expectedCMD == 41) {
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//This command does not have a CRC...Doushite....
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break;//Hopefully the response is correct. Even without CRC....
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2015-10-13 21:33:57 +02:00
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} else
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return CCRCFAIL;
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2015-10-13 18:39:29 +02:00
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}
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if (SDIO->STA & SDIO_STA_CTIMEOUT)
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return CTIMEOUT;
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}
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//Valid Respone Received
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if ((SDIO->RESPCMD & SDIO_RESPCMD_RESPCMD) != expectedCMD) return -1; //Not the expected respose
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//Correct Response
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*(responseBuffer++) = SDIO->RESP1;
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//Long response. Never needed with SD Cards
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if (typeOfAns == LONG_ANS) {
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*(responseBuffer++) = SDIO->RESP2;
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*(responseBuffer++) = SDIO->RESP3;
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*(responseBuffer++) = SDIO->RESP4;
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}
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}
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int SDIO_send_CMD55(){
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int retry = 0x20;
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StatusConv_t converter;
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uint32_t response;
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do {
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//Execute Command and check for valid response
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SDIO_sendCmd(55, cardInfo.rca, SHORT_ANS);
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if (!SDIO_getResp(55, SHORT_ANS, &response))
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{
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//Response valid. Check if Card has accepted switch to application command mode
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converter.value = response;
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if (converter.statusstruct.APP_CMD == 1)
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return 0;
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}
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}while(--retry > 0);
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return -1;
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}
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int SDIO_send_ACMD41(){
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int retry = 0x200;
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if (SDIO_send_CMD55()) return -1;
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do {
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SDIO_sendCmd(41, 1<<30, SHORT_ANS);
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//TODO: Implement Response Check...
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}while(--retry > 0);
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}
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