diff --git a/FATFS/shimatta_sdio_driver/shimatta_sdio-driver.c b/FATFS/shimatta_sdio_driver/shimatta_sdio-driver.c
index 858aeaf..0dc9e50 100644
--- a/FATFS/shimatta_sdio_driver/shimatta_sdio-driver.c
+++ b/FATFS/shimatta_sdio_driver/shimatta_sdio-driver.c
@@ -67,7 +67,7 @@ void SDIO_DMA_Init(){
     DMASTREAM->CR   = DMAM2P;
     //Address Conffiguration
     //Memory address is set by write and read block functions
-    //DMASTREAM->M0AR = (uint32_t)&rxtxbuffer; //Has to be set in red/write func
+    //DMASTREAM->M0AR = (uint32_t)&rxtxbuffer; //Has to be set in read/write func
     DMASTREAM->PAR = (uint32_t)&SDIO->FIFO; //Not sure if this works
     //DMASTREAM->CR   |= DMA_SxCR_EN;
 
@@ -80,10 +80,14 @@ void SDIO_InitModule(){
     //Init Alternate Functions
     CLKPORT->MODER  |= (2<<CLKPIN*2);
     D0PORT->MODER   |= (2<<D0PIN*2);
+    D0PORT->PUPDR   |= (1<<D0PIN*2);
 #if BUSWIDTH==1
     D1PORT->MODER   |= (2<<D1PIN*2);
+    D1PORT->PUPDR   |= (1<<D1PIN*2);
     D2PORT->MODER   |= (2<<D2PIN*2);
+    D2PORT->PUPDR   |= (1<<D2PIN*2);
     D3PORT->MODER   |= (2<<D3PIN*2);
+    D3PORT->PUPDR   |= (1<<D3PIN*2);
 #endif
     //CLKPORT->AFR[(CLKPIN < 8 ? 0 : 1)] |= ALTFUNC << ((CLKPIN < 8 ? CLKPIN : (CLKPIN - 8)) * 4);
     SETAF(CLKPORT,  CLKPIN, ALTFUNC);
@@ -93,6 +97,8 @@ void SDIO_InitModule(){
     SETAF(D2PORT,   D2PIN,  ALTFUNC);
     SETAF(D3PORT,   D3PIN,  ALTFUNC);
 #endif
+
+
     //Init Module
 
     //Set CLK Control Register
@@ -177,7 +183,7 @@ int SDIO_send_CMD55(){
 }
 
 int SDIO_send_ACMD41(){
-    int retry = 0x200;
+    int retry = 0x20;
     if (SDIO_send_CMD55()) return -1;
 
     do {