mhu/stm32f4-sdio
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Improve single block writing and reading

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This commit is contained in:
Mario Hüttel 2020-02-26 23:52:42 +01:00
parent bea543269e
commit e616e22dd7
2 changed files with 14 additions and 14 deletions
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22
fatfs/shimatta_sdio_driver/shimatta_sdio.c
View File

@ -373,9 +373,12 @@ static void sdio_init_hw()
static int sdio_send_read_block_cmd17(uint32_t addr) static int sdio_send_read_block_cmd17(uint32_t addr)
{ {
uint32_t response; uint32_t response;
int retry;
int ret;
sdio_send_cmd(17, addr, SHORT_ANS); sdio_send_cmd(17, addr, SHORT_ANS);
return sdio_get_response(17, SHORT_ANS, &response); ret = sdio_get_response(17, SHORT_ANS, &response);
return ret;
} }
static int sdio_send_all_send_cid_cmd2() static int sdio_send_all_send_cid_cmd2()
@ -605,6 +608,7 @@ DRESULT sdio_disk_read(BYTE *buff, DWORD sector, UINT count){
uint32_t sdio_status; uint32_t sdio_status;
uint32_t fifo; uint32_t fifo;
uint32_t counter; uint32_t counter;
union sdio_status_conv status;
addr = (card_info.type == SD_V2_HC ? (sector) : (sector*512)); addr = (card_info.type == SD_V2_HC ? (sector) : (sector*512));
for (; count > 0; count--) { for (; count > 0; count--) {
@ -619,7 +623,13 @@ DRESULT sdio_disk_read(BYTE *buff, DWORD sector, UINT count){
// DMASTREAM->CR = DMAP2M | DMA_SxCR_PL_1 | DMA_SxCR_PL_1; // DMASTREAM->CR = DMAP2M | DMA_SxCR_PL_1 | DMA_SxCR_PL_1;
// DMASTREAM->CR |= DMA_SxCR_EN; // DMASTREAM->CR |= DMA_SxCR_EN;
do {
sdio_check_status_register_cmd13(card_info.rca, &status.value);
} while (status.statusstruct.CURRENT_STATE != CURRENT_STATE_TRAN);
SDIO->DLEN = (1 << BLOCKSIZE); SDIO->DLEN = (1 << BLOCKSIZE);
SDIO->DTIMER = DTIMEOUT;
SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC | SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC | SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC |
@ -704,16 +714,6 @@ DRESULT sdio_disk_write(const BYTE *buff, DWORD sector, UINT count)
addr = (card_info.type == SD_V2_HC ? (sector) : (sector * 512)); addr = (card_info.type == SD_V2_HC ? (sector) : (sector * 512));
while (count) { while (count) {
do {
sdio_check_status_register_cmd13(card_info.rca, &status.value);
} while (status.statusstruct.CURRENT_STATE == CURRENT_STATE_PRG ||
status.statusstruct.CURRENT_STATE == CURRENT_STATE_RCV);
if (status.statusstruct.CURRENT_STATE == CURRENT_STATE_STBY) {
if (sdio_send_select_card_cmd7(card_info.rca))
return RES_ERROR;
}
do { do {
sdio_check_status_register_cmd13(card_info.rca, &status.value); sdio_check_status_register_cmd13(card_info.rca, &status.value);
} while (status.statusstruct.READY_FOR_DATA != 1); } while (status.statusstruct.READY_FOR_DATA != 1);

4
fatfs/shimatta_sdio_driver/shimatta_sdio_config.h
View File

@ -14,9 +14,9 @@
//Initial Transfer CLK (ca. 400kHz) //Initial Transfer CLK (ca. 400kHz)
#define INITCLK 130 //120 #define INITCLK 130 //120
//Working CLK (Maximum) //Working CLK (Maximum)
#define WORKCLK 50 //0 #define WORKCLK 8 //0
//Data Timeout in CLK Cycles //Data Timeout in CLK Cycles
#define DTIMEOUT 0x3000 //150 #define DTIMEOUT 0x8000 //150
//DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible //DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
// Currently not used due to possible misalignment of the data buffer. // Currently not used due to possible misalignment of the data buffer.
//#define DMASTREAM DMA2_Stream6 //#define DMASTREAM DMA2_Stream6