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3 Commits
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4b07178f3d
Author | SHA1 | Date |
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Mario Hüttel | 4b07178f3d | |
Mario Hüttel | 104bd65ac0 | |
Mario Hüttel | caf5456067 |
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@ -7,11 +7,11 @@ Debug
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*.user.*
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*.lss
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*.d
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stm32f4-sdio.cflags
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stm32f4-sdio.config
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stm32f4-sdio.creator
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stm32f4-sdio.cxxflags
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stm32f4-sdio.files
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stm32f4-sdio.includes
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*.cflags
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*.config
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*.creator
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*.cxxflags
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*.files
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*.includes
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*.jdebug
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@ -78,6 +78,64 @@ DSTATUS SDIO_status(){
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volatile uint32_t debug;
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volatile uint32_t debug_timeout;
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volatile int debug_acmd = 0;
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sdio_write_buffer(uint32_t dlen, uint32_t blklen, uint8_t *buff)
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{
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int count;
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int byte_count;
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int byte_max;
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uint32_t fifo;
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SDIO->DLEN = dlen;
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/* Init Transfer */
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SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
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SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC |
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SDIO_ICR_STBITERRC | SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | SDIO_ICR_CEATAENDC;
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SDIO->DCTRL = (blklen<<4) | SDIO_DCTRL_DTEN;
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for (count = 0; count < dlen; count += 4) {
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fifo = 0;
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if ((dlen - count) < 4)
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byte_max = dlen - count;
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else
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byte_max = 4;
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for (byte_count = 0; byte_count < byte_max; byte_count++)
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{
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fifo >>= 8;
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fifo |= (((uint32_t)*(buff++)) << 24) & 0xFF000000;
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}
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while (SDIO->STA & SDIO_STA_TXFIFOF);
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SDIO->FIFO = fifo;
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}
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while (SDIO->STA & SDIO_STA_TXACT);
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}
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/*
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uint8_t data1[512] = {(1<<1), 16, 0xC9, 0x9A, 0x20, 0x84, 0x3E, 0xD7, 0xD9, 0x0B, 0x68, 0x01,
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0xE4, 0x9F, 0x2B, 0xC8, 0x02, 0x77};
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sdio_unlock_card()
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{
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uint32_t resp[10];
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//SDIO_send_block_length_CMD16(18U);
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SDIO_send_cmd(42, 0, SHORT_ANS);
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SDIO_get_response(42, SHORT_ANS, resp);
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sdio_write_buffer(512, 9, data1);
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}
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*/
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DSTATUS SDIO_initialize(){
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int timeout = 0x3000;
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CMD8_RESP_t res8;
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@ -147,6 +205,9 @@ DSTATUS SDIO_initialize(){
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if (SDIO_send_block_length_CMD16((uint32_t)(1<<BLOCKSIZE)))
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return STA_NOINIT;
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//sdio_unlock_card();
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if (SDIO_send_bus_width_ACMD6(BUSWIDTH))
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return STA_NOINIT;
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@ -192,7 +253,7 @@ DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
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SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC |
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SDIO_ICR_STBITERRC | SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | SDIO_ICR_CEATAENDC;
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SDIO->DCTRL = (BLOCKSIZE<<4) | SDIO_DCTRL_DTDIR | SDIO_DCTRL_DMAEN | SDIO_DCTRL_DTEN;
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SDIO->DCTRL = (BLOCKSIZE<<4) | SDIO_DCTRL_DTDIR | /*SDIO_DCTRL_DMAEN |*/ SDIO_DCTRL_DTEN;
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debug=0;
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counter = 0;
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@ -10,7 +10,7 @@
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#define HW_FLOW 0 //0
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//1 bit: !=4
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//4 bit: 4
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#define BUSWIDTH 4 //4
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#define BUSWIDTH 4 //4
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//Initial Transfer CLK (ca. 400kHz)
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#define INITCLK 130 //120
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//Working CLK (Maximum)
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