Improve read performance by switching to DMA and mult-block operations

fatfs/diskio.c

@@ -28,8 +28,6 @@ DSTATUS disk_status (
 	BYTE pdrv		/* Physical drive nmuber to identify the drive */
 )
 {
-	DSTATUS stat;
-	int result;
 
 	switch (pdrv) {
 	case DEV_SD:
@@ -48,9 +46,6 @@ DSTATUS disk_initialize (
 	BYTE pdrv				/* Physical drive nmuber to identify the drive */
 )
 {
-	DSTATUS stat;
-	int result;
-
 	switch (pdrv) {
 	case DEV_SD:
 		return sdio_initialize();
@@ -71,9 +66,6 @@ DRESULT disk_read (
 	UINT count		/* Number of sectors to read */
 )
 {
-	DRESULT res;
-	int result;
-
 	switch (pdrv) {
 	case DEV_SD:
 		return sdio_disk_read(buff, sector, count);
@@ -96,12 +88,9 @@ DRESULT disk_write (
 	UINT count			/* Number of sectors to write */
 )
 {
-	DRESULT res;
-	int result;
-
 	switch (pdrv) {
 	case DEV_SD:
-		return SDIO_disk_write(buff, sector, count);
+		return sdio_disk_write(buff, sector, count);
 	}
 
 	return RES_PARERR;
@@ -120,9 +109,6 @@ DRESULT disk_ioctl (
 	void *buff		/* Buffer to send/receive control data */
 )
 {
-	DRESULT res;
-	int result;
-
 	switch (pdrv) {
 	case DEV_SD:
 		return sdio_disk_ioctl(cmd, buff);

fatfs/shimatta_sdio_driver/shimatta_sdio.c

@@ -1,22 +1,21 @@
-/*
- * shimatta_sdio-driver.c
- *
- *  Created on: Apr 30, 2015
- *  Mario Hüttel
- */
-
 #include "shimatta_sdio.h"
 #include "shimatta_sdio_config.h"
 #include <cmsis/core_cm4.h>
 #include <stm32f4xx.h>
+#include <string.h>
+#include <stdbool.h>
 
+#ifndef CONCAT
+#define CONCAT(x,y) x##y
+#define XCONCAT(x,y) CONCAT(x,y)
+#endif
 extern void sdio_wait_ms(unsigned int i);
 
 #define SETAF(PORT,PIN,AF)  PORT->AFR[(PIN < 8 ? 0 : 1)] |= AF << ((PIN < 8 ? PIN : (PIN - 8)) * 4)
 
 #define READCTRL ((BLOCKSIZE << 4) | SDIO_DCTRL_DMAEN)
-#define DMAP2M (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL)
-#define DMAM2P (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL | DMA_SxCR_DIR_0)
+#define DMAP2M (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | /*DMA_SxCR_MBURST_0 |*/ DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL)
+#define DMAM2P (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | /*DMA_SxCR_MBURST_0 |*/ DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL | DMA_SxCR_DIR_0)
 #define SHORT_ANS 1
 #define LONG_ANS 3
 #define NO_ANS 0
@@ -33,37 +32,14 @@ enum acmd41_ret {ACMD41_RESP_INIT = 0, ACMD41_RESP_ERR, ACMD41_RESP_SDSC, ACMD41
 enum cmd8_ret {CMD8_RESP_TIMEOUT = 0, CMD8_VOLTAGE_ACCEPTED, CMD8_VOLTAGE_DENIED};
 typedef uint8_t CID_t;
 
-/*
-void SDIO_init_hw();
-
-int SDIO_send_cmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns);
-int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t* responseBuffer);
-
-
-void SDIO_wait_cmd_sent(void);
-ACMD41_RESP_t SDIO_init_card_ACMD41(uint8_t HCS);
-int SDIO_switch_appmode_CMD55(void);
-int SDIO_send_all_send_cid_CMD2(void);
-int SDIO_send_relative_address_CMD3(uint16_t* rca);
-int SDIO_send_go_idle_CMD0(void);
-CMD8_RESP_t SDIO_send_iface_condition_CMD8(void);
-int SDIO_send_block_length_CMD16(uint32_t blocklen);
-int SDIO_send_bus_width_ACMD6(uint8_t bus_width);
-int SDIO_send_csd_CMD9(uint16_t rca, uint32_t *responsebuffer);
-int SDIO_send_select_card_CMD7(uint16_t rca);
-int SDIO_check_status_register_CMD13(uint16_t rca, uint32_t *status);
-void SDIO_init_detect_pins(void);
-int checkNotInserted(void); // Returns 0 if inserted!
-int checkWriteProtection(void); // returns 0 if write protected
-void switchPrescaler(uint8_t clkdiv);
-int SDIO_send_write_block_CMD24(uint32_t addr);
-int SDIO_send_read_block_CMD17(uint32_t addr);
-int SDIO_get_sector_count(uint16_t rca, uint32_t *sector_count);
-*/
-
-//BYTE rxtxbuffer[1<<BLOCKSIZE]; //Data RX and TX Buffer not needed anymore. thanks to DMA
 static struct sd_info card_info; // = {.type = CARD_NONE};
 
+#if USE_DMA
+static volatile char aligned_sector_buff_one[1<<BLOCKSIZE];
+static volatile char aligned_sector_buff_two[1<<BLOCKSIZE];
+static volatile char *aligned_sector_buffs[2] = {aligned_sector_buff_one, aligned_sector_buff_two};
+#endif
+
 /**
  * @brief checkNotInserted
  * @return return 0 if card is inserted, else 1
@@ -94,12 +70,12 @@ static void sdio_wait_cmd_sent()
 	SDIO->ICR |= SDIO_ICR_CMDSENTC;
 }
 
-static int sdio_send_cmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns){
-    //Clear Flags
+static int sdio_send_cmd(uint8_t cmd, uint32_t arg, uint8_t expected_ans){
+	/* Clear Flags */
 	SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CMDSENTC;
-    //Send command
+	/* Send command */
 	SDIO->ARG = arg;
-    SDIO->CMD = (CMD & SDIO_CMD_CMDINDEX) | SDIO_CMD_CPSMEN | /*SDIO_CMD_WAITPEND |*/ ((expectedAns << 6) & SDIO_CMD_WAITRESP);
+	SDIO->CMD = (cmd & SDIO_CMD_CMDINDEX) | SDIO_CMD_CPSMEN | ((expected_ans << 6) & SDIO_CMD_WAITRESP);
 	return 0;
 }
 
@@ -113,13 +89,6 @@ static int sdio_get_response(uint8_t expected_command, uint8_t type_of_answer, u
 	while (1) {
 		sdio_status = SDIO->STA;
 
-        /* Check if a valid response was received */
-        if (sdio_status & SDIO_STA_CMDREND)
-            break;
-
-        if ((sdio_status & SDIO_STA_CMDSENT) && (type_of_answer == NO_ANS))
-            break; // No response required
-
 		/* Exclude ACMD41 and CMD2 from valid CRC check */
 		if ((sdio_status & SDIO_STA_CCRCFAIL)) {
 			if(expected_command == 0xff) {
@@ -131,13 +100,23 @@ static int sdio_get_response(uint8_t expected_command, uint8_t type_of_answer, u
 
 		if (sdio_status & SDIO_STA_CTIMEOUT)
 			return -CTIMEOUT;
+
+		/* Check if a valid response was received */
+		if (sdio_status & SDIO_STA_CMDREND)
+			break;
+
+		if ((sdio_status & SDIO_STA_CMDSENT) && (type_of_answer == NO_ANS))
+			break; // No response required
+
 	}
-    //Valid Respone Received
+
+	/* Valid Respone Received */
 	if (((SDIO->RESPCMD & SDIO_RESPCMD_RESPCMD) != expected_command) && (expected_command != 0xff))
 		return -CNOTEXPETED; //Not the expected respose
 
 	/* If case of a correct Response */
 	*(response_buffer++) = SDIO->RESP1;
+
 	/* Long response */
 	if (type_of_answer == LONG_ANS) {
 		*(response_buffer++) = SDIO->RESP2;
@@ -148,18 +127,22 @@ static int sdio_get_response(uint8_t expected_command, uint8_t type_of_answer, u
 	return 0;
 }
 
+/**
+ * @brief Switch the card to application mode. It now accepts ACMDXX commands
+ * @return 0 if successfuls
+ */
 static int sdio_switch_appmode_cmd55()
 {
 	int retry = 0x20;
 	union sdio_status_conv converter;
 	uint32_t response;
 	do {
-        //Execute Command and check for valid response
+		/* Execute Command and check for valid response */
 		sdio_send_cmd(55, (card_info.rca<<16)&0xFFFF0000, SHORT_ANS);
 
 		if (!sdio_get_response(55, SHORT_ANS, &response))
 		{
-            //Response valid. Check if Card has accepted switch to application command mode
+			/* Response valid. Check if Card has accepted switch to application command mode */
 			converter.value = response;
 			if (converter.statusstruct.APP_CMD == 1)
 				return 0;
@@ -172,11 +155,14 @@ static int sdio_switch_appmode_cmd55()
 enum acmd41_ret sdio_init_card_acmd41(uint8_t HCS){
 	uint32_t response;
 	int retry = 0x20;
-    if (sdio_switch_appmode_cmd55()) return ACMD41_RESP_ERR;
+	if (sdio_switch_appmode_cmd55())
+		return ACMD41_RESP_ERR;
+
 	do {
 		sdio_send_cmd(41, (HCS ? (1<<30) : 0) | (1<<28) | (1<<20) |(1<<21)|(1<<22) |(1<<23)|(1<<19), SHORT_ANS);
 		if (!sdio_get_response(0xFF, SHORT_ANS, &response)) {
-            if (response & OCS_BUSY) { // Card is ready... Who knows why this bit is called busy...
+			if (response & OCS_BUSY) {
+				/* Card is ready... Who knows why this bit is called busy */
 				if (response & OCS_CCS) {
 					return ACMD41_RESP_SDXC;
 				} else {
@@ -191,26 +177,31 @@ enum acmd41_ret sdio_init_card_acmd41(uint8_t HCS){
 	return ACMD41_RESP_ERR;
 }
 
-static int sdio_send_csd_cmd9(uint16_t rca, uint32_t *responsebuffer) {
+static int sdio_send_csd_cmd9(uint16_t rca, uint32_t *response_buffer) {
 	int timeout = 0x20;
 	int res;
 
 	do {
 		sdio_send_cmd(9, (rca<<16)&0xFFFF0000, LONG_ANS);
-        if (!(res = sdio_get_response(0xFF, LONG_ANS, responsebuffer))) {
+		res = sdio_get_response(0xFF, LONG_ANS, response_buffer);
+		if (!res)
 			break;
-        }
 	} while (--timeout > 0);
 
 	return res;
 }
 
-static void sdio_write_buffer(uint32_t dlen, uint32_t blklen, uint8_t *buff)
+/**
+ * @brief Send data buffer to SD card
+ * @param dlen Data length. Must be a multiple of 4 bytes
+ * @param blklen Log2 of block length (9 in case of 512 byte block)
+ * @param buff Buffer to send
+ * @return -1 in case of error like underrun
+ */
+static int __attribute__((optimize("O3"))) sdio_write_buffer(uint32_t dlen, uint32_t log_blklen, const unsigned char *buff)
 {
-	int count;
-	int byte_count;
-	int byte_max;
-	uint32_t fifo;
+	uint32_t count;
+	uint32_t fifo_buff[8];
 
 	SDIO->DLEN = dlen;
 
@@ -218,35 +209,52 @@ static void sdio_write_buffer(uint32_t dlen, uint32_t blklen, uint8_t *buff)
 	SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
 			SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC |
 			SDIO_ICR_STBITERRC | SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | SDIO_ICR_CEATAENDC;
-	SDIO->DCTRL = (blklen<<4) | SDIO_DCTRL_DTEN;
+	SDIO->DCTRL = (log_blklen<<4) | SDIO_DCTRL_DTEN;
 
-	for (count = 0; count < dlen; count += 4) {
-		fifo = 0;
-
-		if ((dlen - count) < 4)
-			byte_max = dlen - count;
-		else
-			byte_max = 4;
-
-		for (byte_count = 0; byte_count < byte_max; byte_count++)
-		{
-			fifo >>= 8;
-			fifo |= (((uint32_t)*(buff++)) << 24) & 0xFF000000;
+	while (dlen >= 32) {
+		memcpy(fifo_buff, buff, 32);
+		/* Wait for 8 data words to be available */
+		while (!(SDIO->STA & SDIO_STA_TXFIFOHE));
+		for (count = 0; count < 8; count++) {
+			SDIO->FIFO = fifo_buff[count];
+		}
+		dlen -= 32;
+		buff += 32;
 	}
 
-		while (SDIO->STA & SDIO_STA_TXFIFOF);
-
-		SDIO->FIFO = fifo;
-
+	if (dlen) {
+		memcpy(fifo_buff, buff, dlen);
+		while (!(SDIO->STA & SDIO_STA_TXFIFOHE));
+		for (count = 0; count < (dlen / 4); count++) {
+			SDIO->FIFO = fifo_buff[count];
+		}
 	}
 
+	/* Wait for TX to complete */
 	while (SDIO->STA & SDIO_STA_TXACT);
 
+	if (SDIO->STA & SDIO_STA_TXUNDERR)
+		return -1;
+	else
+		return 0;
 }
 
 static int sdio_send_write_block_cmd24(uint32_t addr)
 {
-    return -1;
+	uint32_t response;
+
+	sdio_send_cmd(24, addr, SHORT_ANS);
+
+	return sdio_get_response(24, SHORT_ANS, &response);
+}
+
+static int sdio_send_stop_cmd12()
+{
+	uint32_t response;
+
+	sdio_send_cmd(12, 0UL, SHORT_ANS);
+
+	return sdio_get_response(12, SHORT_ANS, &response);
 }
 
 static int sdio_check_status_register_cmd13(uint16_t rca, uint32_t *status)
@@ -254,6 +262,7 @@ static int sdio_check_status_register_cmd13(uint16_t rca, uint32_t *status)
 	int timeout = 0x20;
 	uint32_t response;
 	int res;
+
 	do {
 		sdio_send_cmd(13, (rca<<16)&0xFFFF0000, SHORT_ANS);
 		if (!(res = sdio_get_response(13, SHORT_ANS, &response))) {
@@ -269,15 +278,14 @@ static int sdio_send_bus_width_acmd6(uint8_t bus_width)
 {
 	uint32_t response;
 	int retry = 0x20;
-    union sdio_status_conv status;
 	int ret;
+
 	if (sdio_switch_appmode_cmd55()) return -1;
 	do {
 		sdio_send_cmd(0x6, (bus_width == 4 ? 0x2 : 0x0), SHORT_ANS);
-        if (!(ret = sdio_get_response(0x6, SHORT_ANS, &response))) {
-            status.value = response;
+		ret = sdio_get_response(0x6, SHORT_ANS, &response);
+		if (!ret)
 			return 0;
-        }
 
 	} while (--retry > 0);
 
@@ -297,12 +305,14 @@ static int sdio_get_sector_count(uint16_t rca, uint32_t *sector_count)
 
 	csd_rev = ((csd[0] >> 30) & (0x3));
 
-    if (csd_rev == 0) { // SD v1 Card
+	if (csd_rev == 0) {
+		/* SD v1 Card */
 		size = ((csd[1] & 0x3FF) <<2) | (((csd[2]) & ((1<<31) | (1<<30)))>>30);
 		mult = ((csd[2] & ((1<<17)|(1<<16)|(1<<15)))>>15);
 		read_len = (1<<((csd[1] & ((1<<19)|(1<<18)|(1<<17)|(1<<16)))>>16));
 		*sector_count = (((size +1)*(1<<(mult+2))*read_len) >> BLOCKSIZE);
-    } else if (csd_rev == 1) { // SD v2 Card
+	} else if (csd_rev == 1) {
+		/* SD v2 Card */
 		size = (((csd[1] & 0x3F)<<16) | ((csd[2] & 0xFFFF0000) >> 16));
 		*sector_count = (size << (19-BLOCKSIZE));
 	}
@@ -310,6 +320,10 @@ static int sdio_get_sector_count(uint16_t rca, uint32_t *sector_count)
 	return 0;
 }
 
+/**
+ * @brief Switch the SDIo prescaler
+ * @param Prescaler value
+ */
 static void sdio_switch_prescaler(uint8_t clkdiv)
 {
 	uint32_t reg;
@@ -384,9 +398,21 @@ static void sdio_init_hw()
 static int sdio_send_read_block_cmd17(uint32_t addr)
 {
 	uint32_t response;
+	int ret;
 	
 	sdio_send_cmd(17, addr, SHORT_ANS);
-    return sdio_get_response(17, SHORT_ANS, &response);
+	ret = sdio_get_response(17, SHORT_ANS, &response);
+	return ret;
+}
+
+static int sdio_send_read_multiple_blocks_cmd18(uint32_t addr)
+{
+	uint32_t response;
+	int ret;
+
+	sdio_send_cmd(18, addr, SHORT_ANS);
+	ret = sdio_get_response(18, SHORT_ANS, &response);
+	return ret;
 }
 
 static int sdio_send_all_send_cid_cmd2()
@@ -394,16 +420,21 @@ static int sdio_send_all_send_cid_cmd2()
 	uint32_t response[4];
 	int ret;
 	int retry = 0x20;
+
 	do {
 		sdio_send_cmd(2, 0, LONG_ANS);
-        if (!(ret = sdio_get_response(0xFF, LONG_ANS, response))) return 0;
+		if (!(ret = sdio_get_response(0xFF, LONG_ANS, response)))
+			return 0;
 	} while (retry-- > 0);
+
 	return ret;
 }
 
-static int sdio_send_relative_address_cmd3(uint16_t* rca) {
+static int sdio_send_relative_address_cmd3(uint16_t* rca)
+{
 	uint32_t response;
 	int retry = 0x20;
+
 	do {
 		sdio_send_cmd(3, 0, SHORT_ANS);
 		if (!sdio_get_response(3, SHORT_ANS, &response)) {
@@ -421,10 +452,12 @@ static int sdio_send_go_idle_cmd0() {
 	return 0;
 }
 
-static enum cmd8_ret sdio_send_iface_condition_cmd8() {
+static enum cmd8_ret sdio_send_iface_condition_cmd8()
+{
 	uint32_t response;
 	int res = 0;
 	int retry = 0x20;
+
 	do {
 		sdio_send_cmd(8, 0x1CC, SHORT_ANS); // 3.3V supply requesR
 		res = sdio_get_response(8, SHORT_ANS, &response);
@@ -476,24 +509,281 @@ static int sdio_send_select_card_cmd7(uint16_t rca) {
 	return res;
 }
 
+static void sdio_dma_clear_flags()
+{
+#if USE_DMA
+		/* Configure read DMA */
+#if DMASTREAM_NO > 3
+		DMA2->HIFCR |= XCONCAT(DMA_HIFCR_CFEIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CHTIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CTCIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CTEIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CDMEIF, DMASTREAM_NO);
+#else
+		DMA2->LIFCR |= XCONCAT(DMA_HIFCR_CFEIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CHTIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CTCIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CTEIF, DMASTREAM_NO) |
+				XCONCAT(DMA_HIFCR_CDMEIF, DMASTREAM_NO);
+#endif
+#endif
+}
+
+static void sdio_dma_disable()
+{
+	DMASTREAM->CR = 0x0UL;
+}
+
+static void sdio_data_transfer_disable()
+{
+	SDIO->DCTRL = 0;
+}
+
+static int sdio_dma_check_error()
+{
+	uint32_t status_reg;
+
+#if DMASTREAM_NO > 3
+	status_reg = DMA2->HISR;
+	if (status_reg & XCONCAT(DMA_HISR_TEIF, DMASTREAM_NO))
+		return -1;
+	else
+		return 0;
+#else
+	status_reg = DMA2->LISR;
+	if (status_reg & XCONCAT(DMA_LISR_TEIF, DMASTREAM_NO))
+		return -1;
+	else
+		return 0;
+#endif
+
+
+
+}
+
+static int sdio_wait_for_dma_transfer(bool read)
+{
+	uint32_t sdio_sta_reg;
+
+	while (1) {
+
+		sdio_sta_reg = SDIO->STA;
+
+		if (sdio_sta_reg & SDIO_STA_DCRCFAIL) {
+			sdio_dma_disable();
+			return -2;
+		}
+		if (sdio_sta_reg & SDIO_STA_DTIMEOUT) {
+			sdio_dma_disable();
+			return -1;
+		}
+
+
+		/* Handle FIFO over- / underruns */
+		if (read) {
+			if (sdio_sta_reg & SDIO_STA_RXOVERR)
+				return -3;
+		} else {
+			if (sdio_sta_reg & SDIO_STA_TXUNDERR)
+				return -3;
+		}
+
+		/* Data transferred */
+		if (sdio_sta_reg & SDIO_STA_DATAEND) {
+			break;
+		}
+	}
+
+	/* Wait for DMA to finish copying */
+	while(DMASTREAM->CR & DMA_SxCR_EN);
+	if (sdio_dma_check_error())
+		return -4;
+
+	return 0;
+}
+
+static void sdio_config_rx_dma(volatile void *buff)
+{
+	sdio_dma_clear_flags();
+
+	DMASTREAM->NDTR = 0;
+	DMASTREAM->FCR = DMA_SxFCR_FTH_0 | DMA_SxFCR_FTH_1 | DMA_SxFCR_DMDIS;
+	DMASTREAM->M0AR = (uint32_t)(buff);
+	DMASTREAM->PAR = (uint32_t)&(SDIO->FIFO);
+	DMASTREAM->CR = DMAP2M | DMA_SxCR_PL_1 | DMA_SxCR_PL_1;
+	DMASTREAM->CR |= DMA_SxCR_EN;
+}
+
+static void sdio_config_sdio_data_tran(uint32_t byte_len, bool read, bool dma)
+{
+	SDIO->DLEN = byte_len;
+	SDIO->DTIMER = DTIMEOUT;
+	SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
+			SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC |
+			SDIO_ICR_DATAENDC |
+			SDIO_ICR_STBITERRC | SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | SDIO_ICR_CEATAENDC;
+	SDIO->DCTRL = (BLOCKSIZE<<4) | (read ? SDIO_DCTRL_DTDIR : 0) | (dma ? SDIO_DCTRL_DMAEN : 0) | SDIO_DCTRL_DTEN;
+}
+
+#if USE_DMA
+static int sdio_read_blocks_dma(uint32_t block_count, uint32_t sector_addr, void *dest_buffer)
+{
+	uint32_t addr;
+	int status;
+	bool use_unaligned_workaround = false;
+	uint32_t buff_id = 0;
+	uint32_t count = 0;
+	char *ins_ptr;
+
+	if ((uint32_t)dest_buffer & 0x3UL)
+		use_unaligned_workaround = true;
+	else
+		use_unaligned_workaround = false;
+
+	if (card_info.type == SD_V2_HC)
+		addr = sector_addr;
+	else
+		addr = sector_addr * (1U<<BLOCKSIZE);
+
+	if (use_unaligned_workaround) {
+		while (count < block_count) {
+			sdio_config_rx_dma(aligned_sector_buffs[buff_id]);
+
+			sdio_config_sdio_data_tran(1UL<<BLOCKSIZE, true, true);
+
+			/* Init Transfer */
+			if (sdio_send_read_block_cmd17(addr)) {
+				sdio_dma_disable();
+				sdio_data_transfer_disable();
+				return -1;
+			}
+
+			/* Copy the old buffer */
+			if (count >= 1) {
+				ins_ptr = &((char *)dest_buffer)[(count - 1) * (1UL<<BLOCKSIZE)];
+				memcpy(ins_ptr, (const void *)aligned_sector_buffs[buff_id ^ 1UL], (1UL<<BLOCKSIZE));
+			}
+
+			/* Switch to incative buffer */
+			buff_id ^= 1;
+			count++;
+			addr += ((card_info.type == SD_V2_HC) ? 1 : (1UL<<BLOCKSIZE));
+
+			status = sdio_wait_for_dma_transfer(true);
+			if (status) {
+				/* Handle error */
+				return status;
+			}
+		}
+
+		/* Copy the last transfer */
+		ins_ptr = &((char *)dest_buffer)[(count - 1) * (1U<<BLOCKSIZE)];
+		memcpy(ins_ptr, (const void *)aligned_sector_buffs[buff_id ^ 1U], (1U<<BLOCKSIZE));
+
+	} else {
+		/* Do pure DMA transfer. This is also able to handle multi-sector reads */
+		sdio_config_rx_dma(dest_buffer);
+		sdio_config_sdio_data_tran(block_count * (1UL<<BLOCKSIZE), true, true);
+
+		/* Send multi-block read cmd in case of multiple blocks */
+		if (block_count > 1)
+			status = sdio_send_read_multiple_blocks_cmd18(addr);
+		else
+			status = sdio_send_read_block_cmd17(addr);
+
+		if (status) {
+			sdio_dma_disable();
+			sdio_data_transfer_disable();
+			return -1;
+		}
+
+		status = sdio_wait_for_dma_transfer(true);
+		if (status)
+			return -1;
+
+		if (block_count > 1)
+			sdio_send_stop_cmd12();
+
+	}
+
+	return 0;
+}
+
+#else
+
+static int sdio_read_blocks_polling(uint32_t block_count, uint32_t sector_addr, void *dest_buffer)
+{
+	uint32_t sdio_sta_reg;
+	uint32_t fifo_read;
+	uint32_t addr;
+	char *ptr;
+	int ret_val;
+	int status;
+
+	ptr = (char *)dest_buffer;
+	addr = (card_info.type == SD_V2_HC ? sector_addr : sector_addr * (1UL<<BLOCKSIZE));
+
+	sdio_config_sdio_data_tran(block_count * (1UL<<BLOCKSIZE), true, false);
+
+	if (block_count > 1)
+		status = sdio_send_read_multiple_blocks_cmd18(addr);
+	else
+		status = sdio_send_read_block_cmd17(addr);
+
+	if (status) {
+		ret_val = -1;
+		goto return_val;
+	}
+
+	while (1) {
+		sdio_sta_reg = SDIO->STA;
+		if (sdio_sta_reg & SDIO_STA_RXDAVL) {
+			fifo_read = SDIO->FIFO;
+			memcpy(ptr, &fifo_read, sizeof(uint32_t));
+		}
+
+		if (sdio_sta_reg & SDIO_STA_RXOVERR ||
+				sdio_sta_reg & SDIO_STA_DCRCFAIL ||
+				sdio_sta_reg & SDIO_STA_DTIMEOUT) {
+			sdio_data_transfer_disable();
+			ret_val = -3;
+			goto stop_transmission;
+		}
+
+		if (sdio_sta_reg & SDIO_STA_DATAEND && sdio_sta_reg & SDIO_STA_DBCKEND) {
+			ret_val = 0;
+			break;
+		}
+	}
+
+stop_transmission:
+	if (block_count > 1)
+		sdio_send_stop_cmd12();
+return_val:
+	return ret_val;
+}
+
+#endif /* USE_DMA */
+
 DSTATUS sdio_status()
 {
 	DSTATUS returnval = 0;
 
-    if (sdio_check_inserted()) {
+	if (sdio_check_inserted())
 		returnval |= STA_NODISK;
-    }
-    if (card_info.type == CARD_NONE) {
+
+	if (card_info.type == CARD_NONE)
 		returnval |= STA_NOINIT;
-    }
-    if (sdio_check_write_protection()) {
+
+	if (sdio_check_write_protection())
 		returnval |= STA_PROTECT;
-    }
+
 	return returnval;
 }
 
 DRESULT sdio_disk_ioctl(BYTE cmd, void* buff){
 	DRESULT res = RES_OK;
+
 	switch(cmd) {
 	case GET_BLOCK_SIZE:
 		*((DWORD*)buff) = (DWORD)0x01;
@@ -510,13 +800,12 @@ DRESULT sdio_disk_ioctl(BYTE cmd, void* buff){
 		break;
 	case CTRL_SYNC:
 		res = RES_OK;
-        //No cache
-        //Nothing to do
 		break;
 	default:
 		res = RES_PARERR;
 		break;
 	}
+
 	return res;
 }
 
@@ -542,7 +831,9 @@ DSTATUS sdio_initialize(){
 	}
 
 	sdio_send_go_idle_cmd0();
+
 	sdio_wait_ms(2);
+
 	res8 = sdio_send_iface_condition_cmd8();
 	switch (res8) {
 	case CMD8_VOLTAGE_ACCEPTED: // SDV2 Card
@@ -589,9 +880,6 @@ DSTATUS sdio_initialize(){
 	if (sdio_send_block_length_cmd16((uint32_t)(1<<BLOCKSIZE)))
 		return STA_NOINIT;
 
-    //sdio_unlock_card();
-
-
 	if (sdio_send_bus_width_acmd6(BUSWIDTH))
 		return STA_NOINIT;
 
@@ -606,84 +894,33 @@ DSTATUS sdio_initialize(){
 }
 
 DRESULT sdio_disk_read(BYTE *buff, DWORD sector, UINT count){
-    uint32_t addr;
-    uint32_t sdio_status;
-    uint32_t fifo;
-    uint32_t counter;
+	int status;
+	union sdio_status_conv card_status;
 
-    addr = (card_info.type == SD_V2_HC ? (sector) : (sector*512));
-    for (; count > 0; count--) {
+	if (!buff || !count)
+		return RES_PARERR;
 
-        /* configure read DMA */
-//		DMA2->LIFCR = 0xffffffff;
-//		DMA2->HIFCR = 0xffffffff;
-//		DMASTREAM->NDTR = 0;
-//		DMASTREAM->FCR = DMA_SxFCR_FTH_0 | DMA_SxFCR_FTH_1 | DMA_SxFCR_DMDIS;
-//		DMASTREAM->M0AR = (uint32_t)(buff);
-//		DMASTREAM->PAR = (uint32_t)&(SDIO->FIFO);
-//		DMASTREAM->CR = DMAP2M | DMA_SxCR_PL_1 | DMA_SxCR_PL_1;
-//		DMASTREAM->CR |= DMA_SxCR_EN;
+	do {
+		sdio_check_status_register_cmd13(card_info.rca, &card_status.value);
+	} while (card_status.statusstruct.CURRENT_STATE == CURRENT_STATE_PRG);
 
-        SDIO->DLEN = (1 << BLOCKSIZE);
-
-        /* Init Transfer */
-        if (sdio_send_read_block_cmd17(addr)) {
-            return RES_ERROR;
-        }
-        SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
-                        SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC |
-                        SDIO_ICR_STBITERRC | SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | SDIO_ICR_CEATAENDC;
-        SDIO->DCTRL = (BLOCKSIZE<<4) | SDIO_DCTRL_DTDIR | /*SDIO_DCTRL_DMAEN |*/ SDIO_DCTRL_DTEN;
-
-        counter = 0;
-        while (counter < (1<<(BLOCKSIZE-2)) || !(SDIO->STA & (SDIO_STA_DBCKEND | SDIO_STA_DATAEND))) { // TODO: Handle errors
-            if (SDIO->STA & (SDIO_STA_DCRCFAIL | SDIO_STA_DTIMEOUT | SDIO_STA_STBITERR))
-            {
+	if (card_status.statusstruct.CURRENT_STATE != CURRENT_STATE_TRAN) {
+		status = sdio_send_select_card_cmd7(card_info.rca);
+		if (status)
 			return RES_ERROR;
 	}
 
-            if (SDIO->STA & SDIO_STA_RXDAVL) {
-                counter++;
-                fifo = SDIO->FIFO;
-                *(buff++) = (BYTE)(fifo & 0xFF);
-                fifo >>= 8;
-                *(buff++) = (BYTE)(fifo & 0xFF);
-                fifo >>= 8;
-                *(buff++) = (BYTE)(fifo & 0xFF);
-                fifo >>= 8;
-                *(buff++) = (BYTE)(fifo & 0xFF);
-            }
-
-        }
-        if (SDIO->STA & SDIO_STA_DCRCFAIL) return RES_ERROR;
-
-        //while(DMASTREAM->CR & DMA_SxCR_EN);
-        while(1) {
-            __DSB();
-            __DMB();
-            sdio_status = SDIO->STA;
-            if (sdio_status & SDIO_STA_DCRCFAIL) {
+#if USE_DMA
+	status = sdio_read_blocks_dma(count, sector, buff);
+	if (status)
 		return RES_ERROR;
-            }
-            if (sdio_status & SDIO_STA_DTIMEOUT) {
+#else
+	status = sdio_read_blocks_polling(count, sector, buff);
+	if (status)
 		return RES_ERROR;
-            }
-
-            if (sdio_status & SDIO_STA_DATAEND) {
-
-                if (!(sdio_status & SDIO_STA_RXACT)) {
-                    break;
-                }
-            }
-        }
+#endif /* USE_DMA */
 
 
-        if (card_info.type == SD_V2_HC) {
-            addr++;
-        } else {
-            addr += (1<<BLOCKSIZE);
-        }
-    }
 	return RES_OK;
 }
 
@@ -697,5 +934,33 @@ DRESULT sdio_disk_read(BYTE *buff, DWORD sector, UINT count){
  */
 DRESULT sdio_disk_write(const BYTE *buff, DWORD sector, UINT count)
 {
+	uint32_t addr;
+	union sdio_status_conv status;
+	uint32_t buff_offset = 0;
+	int ret;
+
+	if (sdio_check_write_protection())
+		return RES_WRPRT;
+
+	addr = (card_info.type == SD_V2_HC ? (sector) : (sector * 512));
+
+	while (count) {
+		do {
+			sdio_check_status_register_cmd13(card_info.rca, &status.value);
+		} while (status.statusstruct.READY_FOR_DATA != 1);
+
+		ret = sdio_send_write_block_cmd24(addr);
+		if (ret)
 			return RES_ERROR;
+
+		ret = sdio_write_buffer(512, 9, &buff[buff_offset]);
+		if (ret)
+			return RES_ERROR;
+
+		buff_offset += 512;
+		addr += (card_info.type == SD_V2_HC ? 1 : 512);
+		count--;
+	}
+
+	return RES_OK;
 }

fatfs/shimatta_sdio_driver/shimatta_sdio_config.h

@@ -14,13 +14,16 @@
 //Initial Transfer CLK (ca. 400kHz)
 #define INITCLK   130   //120
 //Working CLK (Maximum)
-#define WORKCLK   50   //0
+#define WORKCLK   2   //0
 //Data Timeout in CLK Cycles
-#define DTIMEOUT  0x3000   //150
+#define DTIMEOUT  0x8000   //150
 //DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
-// Currently not used due to possible misalignment of the data buffer.
-//#define DMASTREAM DMA2_Stream6
 
+#define USE_DMA 1
+
+#define DMASTREAM DMA2_Stream6
+
+#define DMASTREAM_NO 6
 
 /* Port Definitions */
 

include/fatfs/ffconf.h

@@ -8,7 +8,7 @@
 / Function Configurations
 /---------------------------------------------------------------------------*/
 
-#define FF_FS_READONLY	1
+#define FF_FS_READONLY	0
 /* This option switches read-only configuration. (0:Read/Write or 1:Read-only)
 /  Read-only configuration removes writing API functions, f_write(), f_sync(),
 /  f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()

main.c

@@ -22,10 +22,16 @@ volatile uint32_t sdio_wait;
 
 int initreq = 0xFF;
 
-int main() {
-	char buff[1024];
+//const char *write_string = "This is a write test. Okay... Writing seems to work. Let's close the file\n";
+
+char buff[8192*6];
+
+int main()
+{
+	int i;
 	char *name;
 	FILINFO fno;
+
 	RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
 	__DSB();
 	GPIOA->MODER |= OUTPUT(6) | OUTPUT(7);
@@ -39,20 +45,20 @@ int main() {
 	initreq = f_mount(&SDfs, "0:/", 1);
 	while(initreq);
 
-	initreq = f_opendir(&root, "/");
+	for (i = 0; i < 8192*6; i++)
+		buff[i] = 'A';
+
+	initreq = f_open(&file, "foo.txt", FA_OPEN_APPEND | FA_WRITE);
 	if (initreq == FR_OK) {
-		if (!f_readdir(&root, &fno))
-		{
-			name = fno.fname;
-			initreq = f_open(&file, name, FA_READ);
-				if (initreq == FR_OK) {
-					f_gets(buff, sizeof(buff), &file);
-					printf("%s:\r\n%s\r\n",name, buff);
-					f_close(&file);
+		for (i = 0; i < 100; i++) {
+			initreq = f_write(&file, buff, 8192*6, NULL);
+			if (initreq) {
+				initreq++;
+			}
+		}
+		initreq = f_close(&file);
 	}
 
-		}
-	}
 //fflush(stdout);
 
 while(1);

program-device.gdb

@@ -0,0 +1,8 @@
+target extended-remote :2331
+monitor speed 4000
+monitor reset
+load
+monitor reset
+kill
+quit
+

program-device.sh

@@ -0,0 +1,18 @@
+#!/bin/bash
+
+JLinkGDBServer -if SWD -device STM32F407VE &
+sleep 2
+
+# Check if GDB server is still running
+gdbpid=`pidof JLinkGDBServer`
+
+if [[ $gdbpid == "" ]]; then
+	echo ""
+	echo "GDB Server not running! Check target connection."
+	exit
+fi
+
+arm-none-eabi-gdb -x program-device.gdb stm32f4sdio.elf
+sleep 2
+
+kill $gdbpid

stm32f407vgt6_flash.ld

@@ -152,7 +152,7 @@ SECTIONS
 
   /* Uninitialized data section */
   . = ALIGN(4);
-  .bss :
+  .bss (NOLOAD):
   {
     /* This is used by the startup in order to initialize the .bss secion */
     _sbss = .;         /* define a global symbol at bss start */
@@ -167,7 +167,7 @@ SECTIONS
   } >RAM
 
   /* User_heap_stack section, used to check that there is enough RAM left */
-  ._user_heap_stack :
+  ._user_heap_stack (NOLOAD):
   {
     . = ALIGN(4);
     PROVIDE (heap_low = .); /* for _sbrk */