/* * shimatta_sdio-driver.c * * Created on: Apr 30, 2015 * Mario Hüttel */ #include "shimatta_sdio.h" #include "shimatta_sdio_config.h" #define SETAF(PORT,PIN,AF) PORT->AFR[(PIN < 8 ? 0 : 1)] |= AF << ((PIN < 8 ? PIN : (PIN - 8)) * 4) #define READCTRL ((BLOCKSIZE << 4) | SDIO_DCTRL_DMAEN) #define DMAP2M (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL) #define DMAM2P (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL | DMA_SxCR_DIR_0) #define SHORT_ANS 1 #define LONG_ANS 3 #define NO_ANS 0 #define CCRCFAIL 1 #define CTIMEOUT 2 /* OCR Register Masks */ #define OCS_CCS (1<<30) #define OCS_BUSY (1<<31) typedef enum {ACMD41_RESP_INIT = 0, ACMD41_RESP_ERR, ACMD41_RESP_SDSC, ACMD41_RESP_SDXC} ACMD41_RESP_t; typedef enum {CMD8_RESP_TIMEOUT = 0, CMD8_VOLTAGE_ACCEPTED, CMD8_VOLTAGE_DENIED} CMD8_RESP_t; typedef uint8_t CID_t; void SDIO_init_hw(); int SDIO_send_cmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns); int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t* responseBuffer); void SDIO_wait_cmd_sent(); ACMD41_RESP_t SDIO_init_card_ACMD41(uint8_t HCS); int SDIO_switch_appmode_CMD55(); int SDIO_send_all_send_cid_CMD2(); int SDIO_send_relative_address_CMD3(uint16_t* rca); int SDIO_send_go_idle_CMD0(); CMD8_RESP_t SDIO_send_iface_condition_CMD8(); int SDIO_send_block_length_CMD16(uint32_t blocklen); int SDIO_send_bus_width_ACMD6(uint8_t bus_width); int SDIO_send_csd_CMD9(uint16_t rca, uint32_t *responsebuffer); int SDIO_send_select_card_CMD7(uint16_t rca); int SDIO_check_status_register_CMD13(uint16_t rca, uint32_t *status); void SDIO_init_detect_pins(); int checkNotInserted(); // Returns 0 if inserted! int checkWriteProtection(); // returns 0 if write protected void switchPrescaler(uint8_t clkdiv); int SDIO_get_sector_count(uint16_t rca, uint32_t *sector_count); //BYTE rxtxbuffer[1< 0)); switch (resa41) { case ACMD41_RESP_SDSC: detected_card = (hcs_flag ? SD_V2_SC : SD_V1); break; case ACMD41_RESP_SDXC: detected_card = SD_V2_HC; break; default: return STA_NOINIT; break; } if (SDIO_send_all_send_cid_CMD2()) return STA_NOINIT; if (SDIO_send_relative_address_CMD3(&card_info.rca)) return STA_NOINIT; if (SDIO_get_sector_count(card_info.rca, &card_info.sector_count)) return STA_NOINIT; if (SDIO_send_select_card_CMD7(card_info.rca)) return STA_NOINIT; if (SDIO_send_block_length_CMD16((uint32_t)(1<AHB1ENR |= PORTCLKMASK; RCC->APB2ENR |= RCC_APB2ENR_SDIOEN; //Init Alternate Functions CLKPORT->MODER |= (2<MODER |= (2<PUPDR |= (1<MODER |= (2<PUPDR |= (1<MODER |= (2<PUPDR |= (1<MODER |= (2<PUPDR |= (1<MODER |= (2<PUPDR |= (1<AFR[(CLKPIN < 8 ? 0 : 1)] |= ALTFUNC << ((CLKPIN < 8 ? CLKPIN : (CLKPIN - 8)) * 4); SETAF(CLKPORT, CLKPIN, ALTFUNC); SETAF(CMDPORT, CMDPIN, ALTFUNC); SETAF(D0PORT, D0PIN, ALTFUNC); #if BUSWIDTH==4 SETAF(D1PORT, D1PIN, ALTFUNC); SETAF(D2PORT, D2PIN, ALTFUNC); SETAF(D3PORT, D3PIN, ALTFUNC); #endif //Init Module //Set CLK Control Register SDIO->CLKCR = (HW_FLOW<<14) | ((BUSWIDTH == 4 ? 1 : 0)<<11) | SDIO_CLKCR_CLKEN | (INITCLK & SDIO_CLKCR_CLKDIV); //Set Data Timeout SDIO->DTIMER = DTIMEOUT; //Set Data Parameters //SDIO->DCTRL = (BLOCKSIZE << 4) | SDIO_DCTRL_DMAEN; //Set Power Register: Power up Card CLK SDIO->POWER = SDIO_POWER_PWRCTRL_0 | SDIO_POWER_PWRCTRL_1; } void switchPrescaler(uint8_t clkdiv) { uint32_t reg; reg = SDIO->CLKCR; reg &= ~SDIO_CLKCR_CLKDIV; // Clear prescaler reg |= (SDIO_CLKCR_CLKDIV & clkdiv); // Set bits SDIO->CLKCR = reg; } int SDIO_send_bus_width_ACMD6(uint8_t bus_width) { uint32_t response; int retry = 0x20; int ret; if (SDIO_switch_appmode_CMD55()) return -1; do { SDIO_send_cmd(0x6, (bus_width == 4 ? 0x2 : 0x0), SHORT_ANS); if (!(ret = SDIO_get_response(0x6, SHORT_ANS, &response))) return 0; } while(--retry > 0); return ret; } //Send Command //Clear respone Flags //->CRC Fail, complete response, Timeout int SDIO_send_cmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns){ //Clear Flags SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CMDSENTC; //Send command SDIO->ARG = arg; SDIO->CMD = (CMD & SDIO_CMD_CMDINDEX) | SDIO_CMD_CPSMEN | /*SDIO_CMD_WAITPEND |*/ ((expectedAns << 6) & SDIO_CMD_WAITRESP); return 0; } void SDIO_wait_cmd_sent() { while (!(SDIO->STA & SDIO_STA_CMDSENT)); SDIO->ICR |= SDIO_ICR_CMDSENTC; } int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t *responseBuffer) { //Wait for error or success while (1) { if (SDIO->STA & SDIO_STA_CMDREND) break; //Correct Respone Received if ((SDIO->STA & SDIO_STA_CMDSENT) && (typeOfAns == NO_ANS)) break; // No response required //Exclude ACMD41 and CMD2 from valid CRC check if ((SDIO->STA & SDIO_STA_CCRCFAIL)) { if(expectedCMD == 0xff) { // TODO: This seems odd.. break; } else { return -CCRCFAIL; } } if (SDIO->STA & SDIO_STA_CTIMEOUT) return -CTIMEOUT; } //Valid Respone Received if (((SDIO->RESPCMD & SDIO_RESPCMD_RESPCMD) != expectedCMD) && expectedCMD != 0xff) return -1; //Not the expected respose //If case of a correct Response *(responseBuffer++) = SDIO->RESP1; //Long response. if (typeOfAns == LONG_ANS) { *(responseBuffer++) = SDIO->RESP2; *(responseBuffer++) = SDIO->RESP3; *(responseBuffer++) = SDIO->RESP4; } return 0; } int SDIO_switch_appmode_CMD55(){ int retry = 0x20; StatusConv_t converter; uint32_t response; do { //Execute Command and check for valid response SDIO_send_cmd(55, (card_info.rca<<16)&0xFFFF0000, SHORT_ANS); if (!SDIO_get_response(55, SHORT_ANS, &response)) { //Response valid. Check if Card has accepted switch to application command mode converter.value = response; if (converter.statusstruct.APP_CMD == 1) return 0; } }while(--retry > 0); return -1; } ACMD41_RESP_t SDIO_init_card_ACMD41(uint8_t HCS){ uint32_t response; int retry = 0x20; if (SDIO_switch_appmode_CMD55()) return ACMD41_RESP_ERR; do { SDIO_send_cmd(41, (HCS ? (1<<30) : 0) | (1<<28) | (1<<20) |(1<<21), SHORT_ANS); if (!SDIO_get_response(0xFF, SHORT_ANS, &response)) { if (response & OCS_BUSY) { // Card is ready... Who knows why this bit is called busy... if (response & OCS_CCS) { return ACMD41_RESP_SDXC; } else { return ACMD41_RESP_SDSC; } } else { return ACMD41_RESP_INIT; } } }while(--retry > 0); return ACMD41_RESP_ERR; } int SDIO_send_all_send_cid_CMD2() { uint32_t response[4]; int ret; int retry = 0x20; do { SDIO_send_cmd(2, 0, LONG_ANS); if (!(ret = SDIO_get_response(0xFF, LONG_ANS, response))) return 0; }while(retry-- > 0); return ret; } int SDIO_send_relative_address_CMD3(uint16_t* rca) { uint32_t response; int retry = 0x20; do { SDIO_send_cmd(3, 0, SHORT_ANS); if (!SDIO_get_response(3, SHORT_ANS, &response)) { // TODO: Do some *optional* checking *rca = ((response & 0xFFFF0000) >> 16); return 0; } }while(retry-- > 0); return -1; } int SDIO_send_go_idle_CMD0() { SDIO_send_cmd(0, 0x0, NO_ANS); SDIO_wait_cmd_sent(); return 0; } CMD8_RESP_t SDIO_send_iface_condition_CMD8() { uint32_t response; int res = 0; int retry = 0x20; do { SDIO_send_cmd(8, 0x1CC, SHORT_ANS); // 3.3V supply requesR res = SDIO_get_response(8, SHORT_ANS, &response); if (res == 0) { if (response & 0x100) return CMD8_VOLTAGE_ACCEPTED; else return CMD8_VOLTAGE_DENIED; } }while(retry-- > 0); return CMD8_RESP_TIMEOUT; } /** * @brief initDetectandProtectionPins */ void SDIO_init_detect_pins() { #if SDIO_ENABLE_WRITEPROT==1 WRITEPROT_PORT->PUPDR |= ((WRITEPROT_PULLUP ? 1 : 0)<PUPDR |= ((INS_PULLUP? 1 : 0)<IDR & INS_PIN) == (INS_ACTIVE_LEVEL< 0); return res; } int SDIO_send_select_card_CMD7(uint16_t rca) { int timeout = 0x20; uint32_t response; StatusConv_t status; int res; /* Send CMD7. Selects card */ do { SDIO_send_cmd(7, (rca<<16)&0xFFFF0000, SHORT_ANS); if (!(res = SDIO_get_response(7, SHORT_ANS, &response))) { break; } } while(--timeout > 0); /* Check, if card in in TRANS state */ if (SDIO_check_status_register_CMD13(rca, &(status.value))) res = -1; if (status.statusstruct.CURRENT_STATE != CURRENT_STATE_TRAN) res = -2; return res; } int SDIO_check_status_register_CMD13(uint16_t rca, uint32_t *status) { int timeout = 0x20; uint32_t response; int res; do { SDIO_send_cmd(13, (rca<<16)&0xFFFF0000, SHORT_ANS); if (!(res = SDIO_get_response(13, SHORT_ANS, &response))) { *status = response; break; } } while(--timeout > 0); return res; } int SDIO_get_sector_count(uint16_t rca, uint32_t *sector_count) { uint32_t csd[4]; int res; uint32_t size, mult, read_len, csd_rev; if ((res = SDIO_send_csd_CMD9(rca, csd))) { return -1; } csd_rev = ((csd[0] >> 30) & (0x3)); if (csd_rev == 0) { // SD v1 Card size = ((csd[1] & 0x3FF) <<2) | (((csd[2]) & ((1<<31) | (1<<30)))>>30); mult = ((csd[2] & ((1<<17)|(1<<16)|(1<<15)))>>15); read_len = (1<<((csd[1] & ((1<<19)|(1<<18)|(1<<17)|(1<<16)))>>16)); *sector_count = (((size +1)*(1<<(mult+2))*read_len) >> BLOCKSIZE); } else if (csd_rev == 1) { // SD v2 Card size = (((csd[1] & 0x3F)<<16) | ((csd[2] & 0xFFFF0000) >> 16)); *sector_count = (size << (19-BLOCKSIZE)); } return 0; } int SDIO_send_csd_CMD9(uint16_t rca, uint32_t *responsebuffer) { int timeout = 0x20; int res; do { SDIO_send_cmd(9, (rca<<16)&0xFFFF0000, LONG_ANS); if (!(res = SDIO_get_response(0xFF, LONG_ANS, responsebuffer))) { break; } } while(--timeout > 0); return res; } /** * @brief checkWriteProtection * @return 0 if card is writable. */ int checkWriteProtection() { #if SDIO_ENABLE_WRITEPROT return ((WRITEPROT_PORT->IDR & WRITEPROT_PIN) == (WRITEPROT_ACTIVE_LEVEL<