405 lines
10 KiB
C
405 lines
10 KiB
C
/*
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* shimatta_sdio-driver.c
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*
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* Created on: Apr 30, 2015
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* Mario Hüttel
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*/
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#include "shimatta_sdio-driver.h"
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#define SETAF(PORT,PIN,AF) PORT->AFR[(PIN < 8 ? 0 : 1)] |= AF << ((PIN < 8 ? PIN : (PIN - 8)) * 4)
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#define READCTRL ((BLOCKSIZE << 4) | SDIO_DCTRL_DMAEN)
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#define DMAP2M (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL)
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#define DMAM2P (DMA_SxCR_CHSEL_2 | DMA_SxCR_PBURST_0 | DMA_SxCR_MBURST_0 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PSIZE_1 | DMA_SxCR_MINC | DMA_SxCR_PFCTRL | DMA_SxCR_DIR_0)
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#define SHORT_ANS 1
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#define LONG_ANS 3
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#define NO_ANS 0
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#define CCRCFAIL -1
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#define CTIMEOUT -2
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/* OCR Register Masks */
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#define OCS_CCS (1<<30)
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#define OCS_BUSY (1<<31)
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typedef enum {ACMD41_RESP_INIT, ACMD41_RESP_ERR, ACMD41_RESP_SDSC, ACMD41_RESP_SDXC} ACMD41_RESP_t;
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typedef enum {CMD8_RESP_TIMEOUT, CMD8_RESP_ACK, CMD8_RESP_ERR} CMD8_RESP_t;
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typedef uint8_t CID_t;
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void initModuleHw();
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int SDIO_send_cmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns);
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int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t* responseBuffer);
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void SDIO_wait_cmd_sent();
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ACMD41_RESP_t SDIO_send_ACMD41(uint8_t HCS);
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int SDIO_send_CMD55();
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int SDIO_send_CMD2();
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int SDIO_send_CMD3(uint16_t* rca);
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int SDIO_send_CMD0();
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CMD8_RESP_t SDIO_send_CMD8();
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void initDetectandProtectionPins();
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int checkNotInserted(); // Returns 0 if inserted!
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int checkWriteProtection(); // returns 0 if write protected
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void switchPrescaler(uint8_t clkdiv);
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//BYTE rxtxbuffer[1<<BLOCKSIZE]; //Data RX and TX Buffer not needed anymore. thanks to DMA
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SDInfo_t cardInfo; // = {.type = CARD_NONE};
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DSTATUS SDIO_status(){
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DSTATUS returnval = 0;
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if (checkNotInserted()) {
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returnval |= STA_NODISK;
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}
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if (cardInfo.type == CARD_NONE) {
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returnval |= STA_NOINIT;
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}
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if (checkWriteProtection()) {
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returnval |= STA_PROTECT;
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}
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return returnval;
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}
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DSTATUS SDIO_initialize(){
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CMD8_RESP_t res8;
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ACMD41_RESP_t resa41;
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uint8_t hcs_flag = 0;
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cardInfo.rca = 0;
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cardInfo.type = CARD_NONE;
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initModuleHw();
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initDetectandProtectionPins();
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if (checkNotInserted()) {
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return STA_NOINIT | STA_NODISK;
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}
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SDIO_send_CMD0();
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res8 = SDIO_send_CMD8();
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switch (res8) {
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case CMD8_RESP_ACK: // SDV2 Card
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hcs_flag = 1;
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break;
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case CMD8_RESP_ERR: // should not happen
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return STA_NOINIT;
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break;
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case CMD8_RESP_TIMEOUT: // SDV1 Card
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hcs_flag=0;
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break;
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default:
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return STA_NOINIT;
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break;
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}
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do {
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resa41 = SDIO_send_ACMD41(hcs_flag);
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}while(resa41 == ACMD41_RESP_INIT);
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switch (resa41) {
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case ACMD41_RESP_SDSC:
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cardInfo.type = (hcs_flag ? SD_V2_SC : SD_V1);
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break;
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case ACMD41_RESP_SDXC:
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cardInfo.type = SD_V2_HC;
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break;
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default:
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return STA_NOINIT;
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break;
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}
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if (SDIO_send_CMD2())
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return STA_NOINIT;
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if (SDIO_send_CMD3(&cardInfo.rca))
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return STA_NOINIT;
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//TODO: Set block length
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//TODO: Set 4 bit mode
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//TODO:
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switchPrescaler(WORKCLK);
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if (checkWriteProtection()) {
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return STA_PROTECT;
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} else
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return 0;
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}
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DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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return RES_OK;
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}
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DRESULT SDIO_disk_write(const BYTE *buff, DWORD sector, UINT count){
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return RES_OK;
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}
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DRESULT SDIO_disk_ioctl(BYTE cmd, void* buff){
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DRESULT res = RES_OK;
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switch(cmd) {
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case GET_BLOCK_SIZE:
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*((DWORD*)buff) = 0x01;
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break;
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case GET_SECTOR_SIZE:
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*((WORD*)buff) = (1<<BLOCKSIZE);
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break;
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case GET_SECTOR_COUNT:
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res = RES_ERROR;
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//TODO: Implement
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break;
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case CTRL_SYNC:
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res = RES_OK;
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//No cache
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//Nothing to do
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break;
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default:
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res = RES_PARERR;
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break;
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}
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return res;
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}
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DWORD __attribute__((weak)) get_fattime(){
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return (1<<16) | (1<<24); // return Jan. 1st 1980 00:00:00
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}
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void initModuleHw(){
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//Init Clocks
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RCC->AHB1ENR |= PORTCLKMASK;
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RCC->APB2ENR |= RCC_APB2ENR_SDIOEN;
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//Init Alternate Functions
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CLKPORT->MODER |= (2<<CLKPIN*2);
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D0PORT->MODER |= (2<<D0PIN*2);
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D0PORT->PUPDR |= (1<<D0PIN*2);
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#if BUSWIDTH==1
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D1PORT->MODER |= (2<<D1PIN*2);
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D1PORT->PUPDR |= (1<<D1PIN*2);
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D2PORT->MODER |= (2<<D2PIN*2);
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D2PORT->PUPDR |= (1<<D2PIN*2);
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D3PORT->MODER |= (2<<D3PIN*2);
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D3PORT->PUPDR |= (1<<D3PIN*2);
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#endif
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//CLKPORT->AFR[(CLKPIN < 8 ? 0 : 1)] |= ALTFUNC << ((CLKPIN < 8 ? CLKPIN : (CLKPIN - 8)) * 4);
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SETAF(CLKPORT, CLKPIN, ALTFUNC);
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SETAF(D0PORT, D0PIN, ALTFUNC);
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#if BUSWIDTH==1
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SETAF(D1PORT, D1PIN, ALTFUNC);
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SETAF(D2PORT, D2PIN, ALTFUNC);
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SETAF(D3PORT, D3PIN, ALTFUNC);
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#endif
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//Init Module
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//Set CLK Control Register
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SDIO->CLKCR = (HW_FLOW<<14) | (BUSWIDTH<<11) | SDIO_CLKCR_CLKEN | (INITCLK & SDIO_CLKCR_CLKDIV);
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//Set Data Timeout
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SDIO->DTIMER = DTIMEOUT;
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//Set Data Parameters
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//SDIO->DCTRL = (BLOCKSIZE << 4) | SDIO_DCTRL_DMAEN;
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//Set Power Register: Power up Card CLK
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SDIO->POWER = SDIO_POWER_PWRCTRL_0 | SDIO_POWER_PWRCTRL_1;
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}
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void switchPrescaler(uint8_t clkdiv) {
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uint32_t reg;
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reg = SDIO->CLKCR;
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reg &= ~SDIO_CLKCR_CLKDIV; // Clear prescaler
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reg |= (SDIO_CLKCR_CLKDIV & clkdiv); // Set bits
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SDIO->CLKCR = reg;
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}
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//Send Command
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//Clear respone Flags
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//->CRC Fail, complete response, Timeout
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int SDIO_send_cmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns){
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//Clear Flags
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SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CMDSENTC;
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//Send command
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SDIO->ARG = arg;
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SDIO->CMD = (CMD & SDIO_CMD_CMDINDEX) | SDIO_CMD_CPSMEN | SDIO_CMD_WAITPEND | ((expectedAns << 6) & SDIO_CMD_WAITRESP);
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return 0;
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}
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void SDIO_wait_cmd_sent() {
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while (!(SDIO->STA & SDIO_STA_CMDSENT));
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SDIO->ICR |= SDIO_ICR_CMDSENTC;
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}
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int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t *responseBuffer) {
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//Return with success because no data is needed
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if (typeOfAns == NO_ANS) return 0;
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//Wait for error or success
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while (1) {
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if (SDIO->STA & SDIO_STA_CMDREND) break; //Correct Respone Received
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//Exclude ACMD41 and CMD2 from valid CRC check
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if ((SDIO->STA & SDIO_STA_CCRCFAIL)) {
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if(expectedCMD == 0x3f) { // TODO: This seems odd..
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break;
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} else
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return CCRCFAIL;
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}
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if (SDIO->STA & SDIO_STA_CTIMEOUT)
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return CTIMEOUT;
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}
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//Valid Respone Received
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if ((SDIO->RESPCMD & SDIO_RESPCMD_RESPCMD) != expectedCMD) return -1; //Not the expected respose
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//If case of a correct Response
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*(responseBuffer++) = SDIO->RESP1;
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//Long response.
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if (typeOfAns == LONG_ANS) {
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*(responseBuffer++) = SDIO->RESP2;
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*(responseBuffer++) = SDIO->RESP3;
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*(responseBuffer++) = SDIO->RESP4;
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}
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}
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int SDIO_send_CMD55(){
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int retry = 0x20;
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StatusConv_t converter;
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uint32_t response;
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do {
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//Execute Command and check for valid response
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SDIO_send_cmd(55, cardInfo.rca, SHORT_ANS);
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if (!SDIO_get_response(55, SHORT_ANS, &response))
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{
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//Response valid. Check if Card has accepted switch to application command mode
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converter.value = response;
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if (converter.statusstruct.APP_CMD == 1)
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return 0;
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}
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}while(--retry > 0);
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return -1;
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}
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ACMD41_RESP_t SDIO_send_ACMD41(uint8_t HCS){
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uint32_t response;
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int retry = 0x20;
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if (SDIO_send_CMD55()) return -1;
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do {
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SDIO_send_cmd(41, (HCS ? (1<<30) : 0) | (1<<28), SHORT_ANS);
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if (!SDIO_get_response(0x3F, SHORT_ANS, &response)) {
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if (response & OCS_BUSY) { // Card is ready... Who knows why this bit is called busy...
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if (response & OCS_CCS) {
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return ACMD41_RESP_SDXC;
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} else {
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return ACMD41_RESP_SDSC;
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}
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} else {
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return ACMD41_RESP_INIT;
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}
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}
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}while(--retry > 0);
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return ACMD41_RESP_ERR;
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}
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int SDIO_send_CMD2() {
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uint32_t response[4];
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int retry = 0x20;
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do {
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SDIO_send_cmd(2, 0, LONG_ANS);
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if (!SDIO_get_response(0x3F, LONG_ANS, response)) return 0;
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}while(retry-- > 0);
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}
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int SDIO_send_CMD3(uint16_t* rca) {
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uint32_t response;
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int retry = 0x20;
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do {
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SDIO_send_cmd(3, 0, SHORT_ANS);
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if (!SDIO_get_response(3, SHORT_ANS, &response)) {
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// TODO: Do some *optional* checking
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*rca = ((response & 0xFFFF0000) >> 16);
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return 0;
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}
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}while(retry-- > 0);
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return -1;
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}
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int SDIO_send_CMD0() {
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SDIO_send_cmd(0, 0, NO_ANS);
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SDIO_wait_cmd_sent();
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return 0;
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}
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CMD8_RESP_t SDIO_send_CMD8() {
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uint32_t response;
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int res = 0;
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int retry = 0x20;
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do {
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SDIO_send_cmd(8, 0x1CC, SHORT_ANS);
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res = SDIO_get_response(8, SHORT_ANS, &response);
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if (res == 0) {
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if (response & 0x100)
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return CMD8_RESP_ACK;
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else
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return CMD8_RESP_ERR;
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}
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}while(retry-- > 0);
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return CMD8_RESP_TIMEOUT;
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}
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/**
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* @brief initDetectandProtectionPins
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*/
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void initDetectandProtectionPins() {
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#if SDIO_ENABLE_WRITEPROT==1
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WRITEPROT_PORT->PUPDR |= ((WRITEPROT_PULLUP ? 1 : 0)<<WRITEPROT_PIN*2);
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#endif /* SDIO_ENABLE_WRITEPROT */
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#if SDIO_ENABLE_INS==1
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INS_PORT->PUPDR |= ((INS_PULLUP? 1 : 0)<<INS_PIN*2);
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#endif /* SDIO_ENABLE_INS */
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__DSB();
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}
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/**
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* @brief checkNotInserted
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* @return return 0 if card is inserted, else 1
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*/
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int checkNotInserted() {
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#if SDIO_ENABLE_INS
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return ((INS_PORT->IDR & INS_PIN) == INS_ACTIVE_LEVEL ? 0 : 1);
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#else
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return 0; // Assume Card is inserted
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#endif
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}
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/**
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* @brief checkWriteProtection
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* @return 0 if card is writable.
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*/
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int checkWriteProtection() {
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#if SDIO_ENABLE_WRITEPROT
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return ((WRITEPROT_PORT->IDR & WRITEPROT_PIN) == WRITEPROT_ACTIVE_LEVEL ? 1 : 0);
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#else
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return 0; // Assume Card is not write protected
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#endif
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}
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