134 lines
3.4 KiB
C
134 lines
3.4 KiB
C
/*
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* shimatta_sdio-driver.h
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*
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* Created on: Apr 26, 2015
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* Mario Hüttel
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*/
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#ifndef FATFS_SHIMATTA_SDIO_DRIVER_SHIMATTA_SDIO_DRIVER_H_
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#define FATFS_SHIMATTA_SDIO_DRIVER_SHIMATTA_SDIO_DRIVER_H_
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#include <fatfs/diskio.h>
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#include <stm32f4xx.h>
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DSTATUS SDIO_status();
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DSTATUS SDIO_initialize();
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DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count);
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DRESULT SDIO_disk_write(const BYTE *buff, DWORD sector, UINT count);
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DRESULT SDIO_disk_ioctl(BYTE cmd, void* buff);
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DWORD get_fattime();
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//Defines for Card Status in struct _CardStatus
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#define CURRENT_STATE_IDLE 0
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#define CURRENT_STATE_READY 1
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#define CURRENT_STATE_IDENT 2
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#define CURRENT_STATE_STBY 3
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#define CURRENT_STATE_TRAN 4
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#define CURRENT_STATE_DATA 5
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#define CURRENT_STATE_RCV 6
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#define CURRENT_STATE_PRG 7
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#define CURRENT_STATE_DIS 8
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typedef struct _CardStatus {
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uint32_t reserved : 3;
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uint32_t AKE_SEQ_ERROR : 1;
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uint32_t reserved_2 : 1;
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uint32_t APP_CMD : 1;
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uint32_t reserved_3 : 2;
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uint32_t READY_FOR_DATA : 1;
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uint32_t CURRENT_STATE : 4;
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uint32_t ERASE_RESET : 1;
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uint32_t CARD_ECC_DIABLED : 1;
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uint32_t WP_ERASE_SKIP : 1;
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uint32_t CSD_OVERWRITE : 1;
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uint32_t reserved17 : 1;
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uint32_t reserved18 : 1;
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uint32_t ERROR : 1;
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uint32_t CC_ERROR : 1;
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uint32_t CARD_ECC_FAILED : 1;
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uint32_t ILLEGAL_COMMAND : 1;
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uint32_t COM_CRC_ERROR : 1;
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uint32_t LOCK_UNLOCK_FAILED : 1;
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uint32_t CARD_IS_LOCKED : 1;
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uint32_t WP_VIOLATION : 1;
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uint32_t ERASE_PARAM : 1;
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uint32_t ERASE_SEQ_ERROR : 1;
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uint32_t BLOCK_LEN_ERROR : 1;
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uint32_t ADDRESS_ERROR : 1;
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uint32_t OUT_OF_RANGE : 1;
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}CardStatus_t;
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typedef enum {CARD_NONE = 0, MMC, SD_V1, SD_V2_SC, SD_V2_HC} card_type_t;
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// MMC not supported
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typedef struct _SDInfo {
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uint16_t rca;
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card_type_t type;
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}SDInfo_t;
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typedef union _StatusConv {
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CardStatus_t statusstruct;
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uint32_t value;
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}StatusConv_t;
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//General Definitions
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//Blocksize: 512 = 2^9 => 9
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#define BLOCKSIZE 9 //9
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//Hardware Flow: Prevents over- and underruns.
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#define HW_FLOW 0 //0
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//1 bit: 0
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//4 bit: 1
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#define BUSWIDTH 1 //1
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//Initial Transfer CLK (ca. 400kHz)
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#define INITCLK 120 //120
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//Working CLK (Maximum)
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#define WORKCLK 0 //0
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//Data Timeout in CLK Cycles
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#define DTIMEOUT 150 //150
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//DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
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#define DMASTREAM DMA2_Stream3
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//Port Definitions
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#define PORTCLKMASK (RCC_AHB1ENR_GPIODEN | RCC_AHB1ENR_GPIOCEN)
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#define ALTFUNC 12
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#define CLKPORT GPIOC
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#define D0PORT GPIOC
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#define D1PORT GPIOC
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#define D2PORT GPIOC
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#define D3PORT GPIOC
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#define CMDPORT GPIOD
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#define CLKPIN 12
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#define D0PIN 8
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#define D1PIN 9
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#define D2PIN 10
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#define D3PIN 11
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#define CMDPIN 2
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// Write Protection
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#define SDIO_ENABLE_WRITEPROT 0
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#define WRITEPROT_PORT GPIOD // Add this port to port clock mask!
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#define WRITEPROT_PIN 0
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#define WRITEPROT_PULLUP 0
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#define WRITEPROT_ACTIVE_LEVEL 0
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// Card inserted pin
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#define SDIO_ENABLE_INS 0
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#define INS_PORT GPIOD // Add this port to port clock mask!
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#define INS_PIN 0
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#define INS_PULLUP 0
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#define INS_ACTIVE_LEVEL 0
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#endif /* FATFS_SHIMATTA_SDIO_DRIVER_SHIMATTA_SDIO_DRIVER_H_ */
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