startup code: wrote linkerscript, created startup-code file
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startup/startup_stm32f746.c
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startup/startup_stm32f746.c
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startup/stm32f746zgt-axim.ld
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startup/stm32f746zgt-axim.ld
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/*
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* STM32F746ZG Linkerscript for FLASH access over AXI-M
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* Copyright (C) 2017 Mario Hüttel <mario.huettel@gmx.net>
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*
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* This file is part of 'STM32F7 code template'.
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*
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* It is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 2 of the License.
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*
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* This code is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this template. If not, see <http://www.gnu.org/licenses/>.
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* --------------------------------------------------------------------
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* FLASH: 1024K
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* RAM: 256K
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* TCM-Data-RAM: 64K
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* FPU: fpv5-sp-d16
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*
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* Flash sections are accessed via the AXI Interface of the Core
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* Data is stored in normal SRAM unless specified to lay in TCM RAM (section: .dtcm, .dtcm.*)
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* Code can be configured to lay in I-TCM RAM fpr ultra low latency applications (section: .itcm, .itcm.*)
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*/
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/* USER PARAMETERS */
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__ld_stack_size = 0x400
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__ld_heap_size = 0x200
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/* END OF USER PARAMETERS */
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ENTRY(reset_handler)
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__ld_top_of_stack = 0x20050000 /* One byte above the end of the SRAM. Stack is pre-decrewmenting, so this is okay */
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/* Available memory areas */
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MEMORY
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{
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ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 16K
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ITCMFLASH (xr) : ORIGIN = 0x00200000, LENGTH = 1024K
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AXIFLASH (xr) : ORIGIN = 0x08000000, LENGTH = 1024K
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DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 256K
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}
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SECTIONS
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{
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.vectors :
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{
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. = ALIGN(4);
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KEEP(*(.vectors))
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. = ALIGN(4);
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} >AXIFLASH
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP(*(.init)) /* Constructors */
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KEEP(*(.fini)) /* Destructors */
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} >AXIFLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} >AXIFLASH
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.ARM :
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{
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >AXIFLASH
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/* Constructor/Destructor tables */
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >AXIFLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >AXIFLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(.fini_array*))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >AXIFLASH
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/* Tightly coupled instruction RAM */
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__ld_load_itcm = LOADADDR(.itcm);
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.itcm :
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{
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. = ALIGN(4);
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__ld_sitcm = .;
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*(.itcm)
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*(.itcm*)
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. = ALIGN(4);
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__ld_eitcm = .;
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} >ITCMRAM AT> AXIFLASH
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/* Tightly Coupled Memory for Data */
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__ld_load_dtcm = LOADADDR(.dtcm);
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.dtcm :
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{
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. = ALIGN(4);
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__ld_sdtcm = .;
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*(.dtcm)
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*(.dtcm*)
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. = ALIGN(4);
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__ld_edtcm = .
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} >DTCMRAM AT> AXIFLASH
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/* Initialized Data */
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__ld_load_data = LOADADDR(.data);
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.data :
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{
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. = ALIGN(4);
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__ld_sdata = .;
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*(.data)
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*(.data*)
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. = ALIGN(4);
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__ld_edata = .;
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} >RAM AT> AXIFLASH
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/* Uninitialized static data */
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.bss :
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{
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. = ALIGN(4);
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__ld_sbss = .;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__ld_ebss = .;
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} >RAM
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.heap_stack (NOLOAD) :
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{
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. = ALIGN(4);
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__ld_sheap = .;
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. = . + __ld_heap_size;
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__ld_eheap = .;
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. = . + __ld_stack_size;
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. = ALIGN(4);
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} >RAM
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}
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