/*
* STM32F746ZG Linkerscript for FLASH access over AXI-M
* Copyright (C) 2017 Mario Hüttel <mario.huettel@gmx.net>
*
* This file is part of 'STM32F7 code template'.
*
* It is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 2 of the License.
*
* This code is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this template.  If not, see <http://www.gnu.org/licenses/>.
* --------------------------------------------------------------------
* FLASH: 1024K
* RAM: 256K
* TCM-Data-RAM: 64K
* FPU: fpv5-sp-d16
* 
* Flash sections are accessed via the AXI Interface of the Core
* Data is stored in normal SRAM unless specified to lay in TCM RAM (section: .dtcm, .dtcm.*)
* Code can be configured to lay in I-TCM RAM fpr ultra low latency applications (section: .itcm, .itcm.*)
*/

/* USER PARAMETERS */
__ld_stack_size = 0x2000;
__ld_heap_size = 0x200;

/* END OF USER PARAMETERS */
ENTRY(Reset_Handler)
__ld_top_of_stack = 0x20050000; /* One byte above the end of the SRAM. Stack is pre-decrewmenting, so this is okay */



/* Available memory areas */
MEMORY
{
	ITCMRAM (xrw)	: ORIGIN = 0x00000000, LENGTH = 16K
	ITCMFLASH (xr)	: ORIGIN = 0x00200000, LENGTH = 1024K
	AXIFLASH (xr)	: ORIGIN = 0x08000000, LENGTH = 1024K
	DTCMRAM (xrw)	: ORIGIN = 0x20000000, LENGTH = 64K
	RAM (xrw)	: ORIGIN = 0x20010000, LENGTH = 256K	
}

SECTIONS
{
	.vectors :
	{
		. = ALIGN(4);
		KEEP(*(.vectors))
		. = ALIGN(4);
	} >AXIFLASH
	
	.text :
	{
		. = ALIGN(4);
		*(.text)           /* .text sections (code) */
    		*(.text*)          /* .text* sections (code) */
    		*(.rodata)         /* .rodata sections (constants, strings, etc.) */
    		*(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
    		*(.glue_7)         /* glue arm to thumb code */
    		*(.glue_7t)        /* glue thumb to arm code */
		*(.eh_frame)
		KEEP(*(.init))	   /* Constructors */
		KEEP(*(.fini))     /* Destructors  */
	} >AXIFLASH
	
	.ARM.extab : 
	{ 
		*(.ARM.extab* .gnu.linkonce.armextab.*) 
	} >AXIFLASH
	
	.ARM :
	{
    		__exidx_start = .;
      		*(.ARM.exidx*)
      		__exidx_end = .;
   	} >AXIFLASH
	
	/* Constructor/Destructor tables */
 	.preinit_array     :
	{
    		PROVIDE_HIDDEN (__preinit_array_start = .);
    		KEEP (*(.preinit_array*))
    		PROVIDE_HIDDEN (__preinit_array_end = .);
  	} >AXIFLASH
  	
	.init_array :
  	{
    		PROVIDE_HIDDEN (__init_array_start = .);
    		KEEP (*(SORT(.init_array.*)))
    		KEEP (*(.init_array*))
    		PROVIDE_HIDDEN (__init_array_end = .);
  	} >AXIFLASH
  
	.fini_array :
	{
    		PROVIDE_HIDDEN (__fini_array_start = .);
    		KEEP (*(.fini_array*))
    		KEEP (*(SORT(.fini_array.*)))
    		PROVIDE_HIDDEN (__fini_array_end = .);
  	} >AXIFLASH
	
	/* Tightly coupled instruction RAM */
	__ld_load_itcm = LOADADDR(.itcm);
	.itcm :
	{
		. = ALIGN(4);
		__ld_sitcm = .;
		*(.itcm)
		*(.itcm*)
		. = ALIGN(4);
		__ld_eitcm = .;
	} >ITCMRAM AT> AXIFLASH
	
	/* Tightly Coupled Memory for Data */
	__ld_load_dtcm = LOADADDR(.dtcm);	
	.dtcm :
	{
		. = ALIGN(4);
		__ld_sdtcm = .;
		*(.dtcm)
		*(.dtcm*)
		. = ALIGN(4);
		__ld_edtcm = .;
	} >DTCMRAM AT> AXIFLASH
	
	/* Initialized Data */
	__ld_load_data = LOADADDR(.data);
	.data : 
	{
		. = ALIGN(4);
		__ld_sdata = .;
		*(.data)
		*(.data*)
		. = ALIGN(4);
		__ld_edata = .;
	} >RAM AT> AXIFLASH
	
	/* Uninitialized static data */
	.bss :
	{
		. = ALIGN(4);
		__ld_sbss = .;
		*(.bss)
		*(.bss*)
		*(COMMON)
		. = ALIGN(4);
		__ld_ebss = .;
	} >RAM

	.heap_stack (NOLOAD) :
	{
		. = ALIGN(4);
		__ld_sheap = .;
		. = . + __ld_heap_size;
		__ld_eheap = .;
		. = . + __ld_stack_size;
		. = ALIGN(4);
	} >RAM
}