add project files

2018-06-09 13:11:37 +02:00 · 2018-06-09 13:11:37 +02:00 · b78e3989e5
commit b78e3989e5
parent 9b5a17b2a1
10 changed files with 3520 additions and 0 deletions
--- a/.gitignore
+++ b/.gitignore
@ -0,0 +1,27 @@
 # Created by https://www.gitignore.io/api/kicad
 ### KiCad ###
 # For PCBs designed using KiCad: http://www.kicad-pcb.org/
 # Temporary files
 *.000
 *.bak
 *.bck
 *.kicad_pcb-bak
 *~
 _autosave-*
 *.tmp
 # Netlist files (exported from Eeschema)
 *.net
 # Autorouter files (exported from Pcbnew)
 *.dsn
 *.ses
 # Exported BOM files
 *.xml
 *.csv
 # End of https://www.gitignore.io/api/kicad
--- a/AD1974-ADC.sch
+++ b/AD1974-ADC.sch
@ -0,0 +1,34 @@
 EESchema Schematic File Version 4
 LIBS:adc-dac-cache
 EELAYER 26 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
 Sheet 4 4
 Title ""
 Date ""
 Rev ""
 Comp ""
 Comment1 ""
 Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
 $Comp
 L shimatta_adc:AD1974 U?
 U 1 1 5B68D566
 P 5100 5900
 F 0 "U?" H 5800 10687 60  0000 C CNN
 F 1 "AD1974" H 5800 10581 60  0000 C CNN
 F 2 "" H 5550 9200 60  0000 C CNN
 F 3 "" H 5550 9200 60  0000 C CNN
 	1    5100 5900
 	1    0    0    -1  
 $EndComp
 $Sheet
 S 7050 1300 700  1200
 U 5B68D665
 F0 "input-amps" 50
 F1 "input-amps.sch" 50
 $EndSheet
 $EndSCHEMATC
--- a/ADAU1966-DAC.sch
+++ b/ADAU1966-DAC.sch
--- a/adc-dac-cache.lib
+++ b/adc-dac-cache.lib
@ -0,0 +1,313 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
 # Device:C
 #
 DEF Device:C C 0 10 N Y 1 F N
 F0 "C" 25 100 50 H V L CNN
 F1 "Device:C" 25 -100 50 H V L CNN
 F2 "" 38 -150 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
 C_*
 $ENDFPLIST
 DRAW
 P 2 0 1 20 -80 -30 80 -30 N
 P 2 0 1 20 -80 30 80 30 N
 X ~ 1 0 150 110 D 50 50 1 1 P
 X ~ 2 0 -150 110 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
 # Device:CP
 #
 DEF Device:CP C 0 10 N Y 1 F N
 F0 "C" 25 100 50 H V L CNN
 F1 "Device:CP" 25 -100 50 H V L CNN
 F2 "" 38 -150 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
 CP_*
 $ENDFPLIST
 DRAW
 S -90 20 -90 40 0 1 0 N
 S -90 20 90 20 0 1 0 N
 S 90 -20 -90 -40 0 1 0 F
 S 90 40 -90 40 0 1 0 N
 S 90 40 90 20 0 1 0 N
 P 2 0 1 0 -70 90 -30 90 N
 P 2 0 1 0 -50 110 -50 70 N
 X ~ 1 0 150 110 D 50 50 1 1 P
 X ~ 2 0 -150 110 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
 # Device:L
 #
 DEF Device:L L 0 40 N N 1 F N
 F0 "L" -50 0 50 V V C CNN
 F1 "Device:L" 75 0 50 V V C CNN
 F2 "" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
 Choke_*
 *Coil*
 Inductor_*
 L_*
 $ENDFPLIST
 DRAW
 A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
 A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
 A 0 25 25 -899 899 0 1 0 N 0 0 0 50
 A 0 75 25 -899 899 0 1 0 N 0 50 0 100
 X 1 1 0 150 50 D 50 50 1 1 P
 X 2 2 0 -150 50 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
 # Device:L_Small
 #
 DEF Device:L_Small L 0 10 N N 1 F N
 F0 "L" 30 40 50 H V L CNN
 F1 "Device:L_Small" 30 -40 50 H V L CNN
 F2 "" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
 Choke_*
 *Coil*
 Inductor_*
 L_*
 $ENDFPLIST
 DRAW
 A 0 -60 20 -899 899 0 1 0 N 0 -80 0 -40
 A 0 -20 20 -899 899 0 1 0 N 0 -40 0 0
 A 0 20 20 -899 899 0 1 0 N 0 0 0 40
 A 0 60 20 -899 899 0 1 0 N 0 40 0 80
 X ~ 1 0 100 20 D 50 50 1 1 P
 X ~ 2 0 -100 20 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
 # Device:Q_PNP_BCEC
 #
 DEF Device:Q_PNP_BCEC Q 0 0 Y N 1 F N
 F0 "Q" 200 50 50 H V L CNN
 F1 "Device:Q_PNP_BCEC" 200 -50 50 H V L CNN
 F2 "" 200 100 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 C 50 0 111 0 1 10 N
 P 2 0 1 0 25 25 100 100 N
 P 2 0 1 0 200 100 100 100 N
 P 3 0 1 0 25 -25 100 -100 100 -100 N
 P 3 0 1 20 25 75 25 -75 25 -75 N
 P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
 X B 1 -200 0 225 R 50 50 1 1 I
 X C 2 100 200 100 D 50 50 1 1 P
 X E 3 100 -200 100 U 50 50 1 1 P
 X C 4 200 200 100 D 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
 # Device:R
 #
 DEF Device:R R 0 0 N Y 1 F N
 F0 "R" 80 0 50 V V C CNN
 F1 "Device:R" 0 0 50 V V C CNN
 F2 "" -70 0 50 V I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
 R_*
 $ENDFPLIST
 DRAW
 S -40 -100 40 100 0 1 10 N
 X ~ 1 0 150 50 D 50 50 1 1 P
 X ~ 2 0 -150 50 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
 # power:GND
 #
 DEF power:GND #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -250 50 H I C CNN
 F1 "power:GND" 0 -150 50 H V C CNN
 F2 "" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
 # shimatta_adc:AD1974
 #
 DEF shimatta_adc:AD1974 U 0 40 Y Y 1 F N
 F0 "U" 1300 4650 60 H V C CNN
 F1 "shimatta_adc:AD1974" 200 4650 60 H V C CNN
 F2 "" 450 3300 60 H V C CNN
 F3 "" 450 3300 60 H V C CNN
 DRAW
 T 900 950 3750 60 0 0 0 "Analog Input" Normal 0 C C
 T 900 400 600 60 0 0 0 "Analog Supply" Normal 0 C C
 T 900 500 2650 60 0 0 0 "Aux. Data" Normal 0 C C
 T 900 450 4150 60 0 0 0 Control Normal 0 C C
 T 900 450 3100 60 0 0 0 Data Normal 0 C C
 T 900 1050 600 60 0 0 0 "Digital Supply" Normal 0 C C
 T 900 350 1900 60 0 0 0 Filter Normal 0 C C
 T 900 550 3750 60 0 1 0 Clock Normal 0 C C
 S 0 0 1400 4600 0 1 0 f
 P 2 0 1 0 1400 3450 1350 3450 N
 P 3 0 1 0 0 1250 350 1250 350 0 N
 P 3 0 1 0 0 4000 400 4000 400 4600 N
 P 3 0 1 0 1000 4600 1000 3450 1350 3450 N
 P 3 0 1 0 1400 1250 1100 1250 1100 0 N
 P 4 0 1 0 0 2100 300 2100 300 1800 0 1800 N
 P 4 0 1 0 0 2850 450 2850 450 2450 0 2450 N
 P 4 0 1 0 0 3400 400 3400 400 3000 0 3000 N
 P 4 0 1 0 0 3900 500 3900 500 3650 0 3650 N
 X AGND 1 -200 650 200 R 50 50 1 1 W
 X PD/RST 10 -200 4500 200 R 50 50 1 1 I I
 X 11 11 1600 2850 200 L 50 50 1 1 N N
 X DGND 12 1600 350 200 L 50 50 1 1 W
 X DVDD 13 1600 900 200 L 50 50 1 1 W
 X AUXDATA2 14 -200 2500 200 R 50 50 1 1 B
 X AUXDATA1 15 -200 2600 200 R 50 50 1 1 B
 X 16 16 1600 2300 200 L 50 50 1 1 N N
 X AUXBCLK 17 -200 2700 200 R 50 50 1 1 B C
 X AUXLRCLK 18 -200 2800 200 R 50 50 1 1 B C
 X ASDATA2 19 -200 3050 200 R 50 50 1 1 B
 X MCLKI/XI 2 -200 3850 200 R 50 50 1 1 I C
 X ASDATA1 20 -200 3150 200 R 50 50 1 1 O
 X ABCLK 21 -200 3250 200 R 50 50 1 1 B C
 X ALRCLK 22 -200 3350 200 R 50 50 1 1 B C
 X CIN 23 -200 4350 200 R 50 50 1 1 I
 X COUT 24 -200 4250 200 R 50 50 1 1 B
 X DGND 25 1600 250 200 L 50 50 1 1 W
 X CCLK 26 -200 4150 200 R 50 50 1 1 I C
 X CLATCH 27 -200 4050 200 R 50 50 1 1 I
 X 28 28 1600 2700 200 L 50 50 1 1 N N
 X 29 29 1600 2600 200 L 50 50 1 1 N N
 X MCLKO/XO 3 -200 3700 200 R 50 50 1 1 O C
 X 30 30 1600 2500 200 L 50 50 1 1 N N
 X 31 31 1600 2400 200 L 50 50 1 1 N N
 X AGND 32 -200 450 200 R 50 50 1 1 W
 X AVDD 33 -200 1100 200 R 50 50 1 1 W
 X AGND 34 -200 350 200 R 50 50 1 1 W
 X FILTR 35 -200 1950 200 R 50 50 1 1 O
 X AGND 36 -200 250 200 R 50 50 1 1 W
 X AVDD 37 -200 1000 200 R 50 50 1 1 W
 X CM 38 -200 2050 200 R 50 50 1 1 w
 X ADC1LP 39 1600 4500 200 L 50 50 1 1 I
 X AGND 4 -200 550 200 R 50 50 1 1 W
 X ADC1LN 40 1600 4400 200 L 50 50 1 1 I
 X ADC1RP 41 1600 4200 200 L 50 50 1 1 I
 X ADC1RN 42 1600 4100 200 L 50 50 1 1 I
 X ADC2LP 43 1600 3900 200 L 50 50 1 1 I
 X ADC2LN 44 1600 3800 200 L 50 50 1 1 I
 X ADC2RP 45 1600 3600 200 L 50 50 1 1 I
 X ADC2RN 46 1600 3500 200 L 50 50 1 1 I
 X LF 47 -200 1850 200 R 50 50 1 1 I
 X AVDD 48 -200 900 200 R 50 50 1 1 I
 X AVDD 5 -200 1200 200 R 50 50 1 1 W
 X 6 6 1600 3250 200 L 50 50 1 1 N N
 X 7 7 1600 3150 200 L 50 50 1 1 N N
 X 8 8 1600 3050 200 L 50 50 1 1 N N
 X 9 9 1600 2950 200 L 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #
 # shimatta_analog:ADAU1966
 #
 DEF shimatta_analog:ADAU1966 U 0 40 Y Y 3 L N
 F0 "U" 650 50 50 H V C CNN
 F1 "shimatta_analog:ADAU1966" 200 50 50 H V C CNN
 F2 "" 0 100 50 H I C CNN
 F3 "" 0 100 50 H I C CNN
 DRAW
 S 0 0 850 -2250 1 1 0 f
 S 0 0 1300 -1500 2 1 0 f
 S 0 0 850 -2000 3 1 0 f
 X DAC_BIAS3 1 -100 -1700 100 R 50 50 1 1 I
 X AVDD4 12 -100 -400 100 R 50 50 1 1 W
 X AGND4 13 950 -400 100 L 50 50 1 1 W
 X PLLGND 14 950 -600 100 L 50 50 1 1 W
 X LF 15 -100 -850 100 R 50 50 1 1 O
 X PLLVDD 16 -100 -600 100 R 50 50 1 1 W
 X DAC_BIAS4 2 -100 -1800 100 R 50 50 1 1 I
 X DVDD 20 -100 -1050 100 R 50 50 1 1 W
 X DGND 21 950 -1050 100 L 50 50 1 1 W
 X IOVDD 22 -100 -1450 100 R 50 50 1 1 W
 X VSENSE 23 950 -1900 100 L 50 50 1 1 I
 X VDRIVE 24 950 -1800 100 L 50 50 1 1 O
 X VSUPPLY 25 950 -1700 100 L 50 50 1 1 I
 X DGND 26 950 -1150 100 L 50 50 1 1 W
 X DVDD 29 -100 -1150 100 R 50 50 1 1 W
 X AVDD3 3 -100 -300 100 R 50 50 1 1 W
 X DGND 30 950 -1250 100 L 50 50 1 1 W
 X IOVDD 39 -100 -1550 100 R 50 50 1 1 W
 X DGND 40 950 -1350 100 L 50 50 1 1 W
 X DVDD 41 -100 -1250 100 R 50 50 1 1 W
 X AGND1 48 950 -100 100 L 50 50 1 1 W
 X AVDD1 49 -100 -100 100 R 50 50 1 1 W
 X AVDD2 58 -100 -200 100 R 50 50 1 1 W
 X DAC_BIAS1 59 -100 -1900 100 R 50 50 1 1 I
 X DAC_BIAS2 60 -100 -2000 100 R 50 50 1 1 I
 X AGND2 61 950 -200 100 L 50 50 1 1 W
 X CM 62 950 -2200 100 L 50 50 1 1 O
 X TS_REF 63 -100 -2200 100 R 50 50 1 1 O
 X AGND3 80 950 -300 100 L 50 50 1 1 W
 X MCLKI/XTALI 17 -100 -100 100 R 50 50 2 1 I
 X XTALO 18 -100 -200 100 R 50 50 2 1 O
 X MCLKO 19 -100 -300 100 R 50 50 2 1 O
 X DBCLK 27 -100 -450 100 R 50 50 2 1 B C
 X DLRCLK 28 -100 -550 100 R 50 50 2 1 B C
 X DSDATA8/SA 31 -100 -750 100 R 50 50 2 1 I
 X DSDATA7/SA 32 -100 -850 100 R 50 50 2 1 I
 X DSDATA6 33 -100 -950 100 R 50 50 2 1 I
 X DSDATA5 34 -100 -1050 100 R 50 50 2 1 I
 X DSDATA4 35 -100 -1150 100 R 50 50 2 1 I
 X DSDATA3 36 -100 -1250 100 R 50 50 2 1 I
 X DSDATA2 37 -100 -1350 100 R 50 50 2 1 I
 X DSDATA1 38 -100 -1450 100 R 50 50 2 1 I
 X CDATA/ADDR1/SA 42 1400 -800 100 L 50 50 2 1 I
 X COUT/SDA/SA 43 1400 -700 100 L 50 50 2 1 B
 X CCLK/SCL/SA 44 1400 -600 100 L 50 50 2 1 I C
 X ~CLATCH~/ADDR0/SA 45 1400 -500 100 L 50 50 2 1 I
 X SA_MODE 46 1400 -200 100 L 50 50 2 1 I
 X PU/~RST~ 47 1400 -100 100 L 50 50 2 1 I
 X DAC16+ 10 950 -100 100 L 50 50 3 1 O
 X DAC16- 11 950 -200 100 L 50 50 3 1 O
 X DAC13+ 4 950 -850 100 L 50 50 3 1 O
 X DAC13- 5 950 -950 100 L 50 50 3 1 O
 X DAC1+ 50 -100 -100 100 R 50 50 3 1 O
 X DAC1- 51 -100 -200 100 R 50 50 3 1 O
 X DAC2+ 52 -100 -350 100 R 50 50 3 1 O
 X DAC2- 53 -100 -450 100 R 50 50 3 1 O
 X DAC3+ 54 -100 -600 100 R 50 50 3 1 O
 X DAC3- 55 -100 -700 100 R 50 50 3 1 O
 X DAC4+ 56 -100 -850 100 R 50 50 3 1 O
 X DAC4- 57 -100 -950 100 R 50 50 3 1 O
 X DAC14+ 6 950 -600 100 L 50 50 3 1 O
 X DAC5+ 64 -100 -1100 100 R 50 50 3 1 O
 X DAC5- 65 -100 -1200 100 R 50 50 3 1 O
 X DAC6+ 66 -100 -1350 100 R 50 50 3 1 O
 X DAC6- 67 -100 -1450 100 R 50 50 3 1 O
 X DAC7+ 68 -100 -1600 100 R 50 50 3 1 O
 X DAC7- 69 -100 -1700 100 R 50 50 3 1 O
 X DAC14- 7 950 -700 100 L 50 50 3 1 O
 X DAC8+ 70 -100 -1850 100 R 50 50 3 1 O
 X DAC8- 71 -100 -1950 100 R 50 50 3 1 O
 X DAC9+ 72 950 -1850 100 L 50 50 3 1 O
 X DAC9- 73 950 -1950 100 L 50 50 3 1 O
 X DAC10+ 74 950 -1600 100 L 50 50 3 1 O
 X DAC10- 75 950 -1700 100 L 50 50 3 1 O
 X DAC11+ 76 950 -1350 100 L 50 50 3 1 O
 X DAC11- 77 950 -1450 100 L 50 50 3 1 O
 X DAC12+ 78 950 -1100 100 L 50 50 3 1 O
 X DAC12- 79 950 -1200 100 L 50 50 3 1 O
 X DAC15+ 8 950 -350 100 L 50 50 3 1 O
 X DAC15- 9 950 -450 100 L 50 50 3 1 O
 ENDDRAW
 ENDDEF
 #
 #End Library
--- a/adc-dac.kicad_pcb
+++ b/adc-dac.kicad_pcb
--- a/adc-dac.pro
+++ b/adc-dac.pro
@ -0,0 +1,33 @@
 update=22/05/2015 07:44:53
 version=1
 last_client=kicad
 [general]
 version=1
 RootSch=
 BoardNm=
 [pcbnew]
 version=1
 LastNetListRead=
 UseCmpFile=1
 PadDrill=0.600000000000
 PadDrillOvalY=0.600000000000
 PadSizeH=1.500000000000
 PadSizeV=1.500000000000
 PcbTextSizeV=1.500000000000
 PcbTextSizeH=1.500000000000
 PcbTextThickness=0.300000000000
 ModuleTextSizeV=1.000000000000
 ModuleTextSizeH=1.000000000000
 ModuleTextSizeThickness=0.150000000000
 SolderMaskClearance=0.000000000000
 SolderMaskMinWidth=0.000000000000
 DrawSegmentWidth=0.200000000000
 BoardOutlineThickness=0.100000000000
 ModuleOutlineThickness=0.150000000000
 [cvpcb]
 version=1
 NetIExt=net
 [eeschema]
 version=1
 LibDir=
 [eeschema/libraries]
--- a/adc-dac.sch
+++ b/adc-dac.sch
@ -0,0 +1,44 @@
 EESchema Schematic File Version 4
 LIBS:adc-dac-cache
 EELAYER 26 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
 Sheet 1 4
 Title ""
 Date ""
 Rev ""
 Comp ""
 Comment1 ""
 Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
 $Sheet
 S 650  650  1200 1600
 U 5B1CDB10
 F0 "ADAU1966-DAC" 50
 F1 "ADAU1966-DAC.sch" 50
 F2 "DAT[1..8]" I R 1850 750 50 
 F3 "BCLK" I R 1850 2000 50 
 F4 "LRCLK" I R 1850 1900 50 
 F5 "MCLKO" O R 1850 1800 50 
 F6 "~CLATCH" I R 1850 1550 50 
 F7 "CCLK" I R 1850 1450 50 
 F8 "COUT" I R 1850 1350 50 
 F9 "CDATA" I R 1850 1250 50 
 F10 "5V" I R 1850 1000 50 
 F11 "PU~RST" I R 1850 1150 50 
 F12 "IOVDD" I R 1850 900 50 
 $EndSheet
 Text Label 2000 750  0    50   ~ 0
 DAT[1..8]
 Wire Bus Line
 	1850 750  2750 750 
 $Sheet
 S 650  2550 1200 2500
 U 5B68D44E
 F0 "AD1974-ADC" 50
 F1 "AD1974-ADC.sch" 50
 $EndSheet
 $EndSCHEMATC
--- a/input-amps.sch
+++ b/input-amps.sch
@ -0,0 +1,17 @@
 EESchema Schematic File Version 4
 LIBS:adc-dac-cache
 EELAYER 26 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
 Sheet 1 1
 Title ""
 Date ""
 Rev ""
 Comp ""
 Comment1 ""
 Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
 $EndSCHEMATC
--- a/output-amps.sch
+++ b/output-amps.sch
@ -0,0 +1,83 @@
 EESchema Schematic File Version 4
 LIBS:adc-dac-cache
 EELAYER 26 0
 EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
 Sheet 3 4
 Title ""
 Date ""
 Rev ""
 Comp ""
 Comment1 ""
 Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
 Text HLabel 850  750  0    50   Input ~ 0
 CH1+
 Text HLabel 850  850  0    50   Input ~ 0
 CH1-
 Text HLabel 850  1000 0    50   Input ~ 0
 CH2+
 Text HLabel 850  1100 0    50   Input ~ 0
 CH2-
 Text HLabel 850  1250 0    50   Input ~ 0
 CH3+
 Text HLabel 850  1350 0    50   Input ~ 0
 CH3-
 Text HLabel 850  1500 0    50   Input ~ 0
 CH4+
 Text HLabel 850  1600 0    50   Input ~ 0
 CH4-
 Text HLabel 850  1750 0    50   Input ~ 0
 CH5+
 Text HLabel 850  1850 0    50   Input ~ 0
 CH5-
 Text HLabel 850  2000 0    50   Input ~ 0
 CH6+
 Text HLabel 850  2100 0    50   Input ~ 0
 CH6-
 Text HLabel 850  2250 0    50   Input ~ 0
 CH7+
 Text HLabel 850  2350 0    50   Input ~ 0
 CH7-
 Text HLabel 850  2500 0    50   Input ~ 0
 CH8+
 Text HLabel 850  2600 0    50   Input ~ 0
 CH8-
 Text HLabel 850  2750 0    50   Input ~ 0
 CH9+
 Text HLabel 850  2850 0    50   Input ~ 0
 CH9-
 Text HLabel 850  3000 0    50   Input ~ 0
 CH10+
 Text HLabel 850  3100 0    50   Input ~ 0
 CH10-
 Text HLabel 850  3250 0    50   Input ~ 0
 CH11+
 Text HLabel 850  3350 0    50   Input ~ 0
 CH11-
 Text HLabel 850  3500 0    50   Input ~ 0
 CH12+
 Text HLabel 850  3600 0    50   Input ~ 0
 CH12-
 Text HLabel 850  3750 0    50   Input ~ 0
 CH13+
 Text HLabel 850  3850 0    50   Input ~ 0
 CH13-
 Text HLabel 850  4000 0    50   Input ~ 0
 CH14+
 Text HLabel 850  4100 0    50   Input ~ 0
 CH14-
 Text HLabel 850  4250 0    50   Input ~ 0
 CH15+
 Text HLabel 850  4350 0    50   Input ~ 0
 CH15-
 Text HLabel 850  4500 0    50   Input ~ 0
 CH16+
 Text HLabel 850  4600 0    50   Input ~ 0
 CH16-
 Text HLabel 850  4800 0    50   Input ~ 0
 5V
 $EndSCHEMATC
--- a/4
+++ b/4
@ -0,0 +1,4 @@
 (sym_lib_table
  (lib (name shimatta_analog)(type Legacy)(uri ${SHIMATTA_DIR}/schematics/shimatta_analog.lib)(options "")(descr ""))
  (lib (name shimatta_adc)(type Legacy)(uri ${SHIMATTA_DIR}/schematics/shimatta_adc.lib)(options "")(descr ""))
 )