diff --git a/dvi-sniffer.kicad_pcb b/dvi-sniffer.kicad_pcb index af9278e..b39ecf9 100644 --- a/dvi-sniffer.kicad_pcb +++ b/dvi-sniffer.kicad_pcb @@ -2,8 +2,8 @@ (general (links 478) - (no_connects 1) - (area 18.088499 19.924999 120.075001 120.075001) + (no_connects 0) + (area 19.924999 19.924999 120.075001 120.075001) (thickness 1.6) (drawings 6) (tracks 5002) @@ -582,6 +582,176 @@ (add_net "Net-(X501-Pad8)") ) + (module smd:HQFP-64_10x10mm_Pitch0.5mm_handsoldering (layer B.Cu) (tedit 58768373) (tstamp 584DB962) + (at 55.25 101.025 90) + (descr "64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [TQFP] (see Microchip Packaging Specification 00000049BS.pdf)") + (tags "QFP 0.5") + (path /583BE4A7/583BE73C) + (attr smd) + (fp_text reference U501 (at 7.75 -7.25 180) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value TFP410 (at 0 -7.45 90) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -5.175 4.225) (end -6.45 4.225) (layer B.SilkS) (width 0.15)) + (fp_line (start 5.175 5.175) (end 4.125 5.175) (layer B.SilkS) (width 0.15)) + (fp_line (start 5.175 -5.175) (end 4.125 -5.175) (layer B.SilkS) (width 0.15)) + (fp_line (start -5.175 -5.175) (end -4.125 -5.175) (layer B.SilkS) (width 0.15)) + (fp_line (start -5.175 5.175) (end -4.125 5.175) (layer B.SilkS) (width 0.15)) + (fp_line (start -5.175 -5.175) (end -5.175 -4.125) (layer B.SilkS) (width 0.15)) + (fp_line (start 5.175 -5.175) (end 5.175 -4.125) (layer B.SilkS) (width 0.15)) + (fp_line (start 5.175 5.175) (end 5.175 4.125) (layer B.SilkS) (width 0.15)) + (fp_line (start -5.175 5.175) (end -5.175 4.225) (layer B.SilkS) (width 0.15)) + (fp_line (start -6.7 -6.7) (end 6.7 -6.7) (layer B.CrtYd) (width 0.05)) + (fp_line (start -6.7 6.7) (end 6.7 6.7) (layer B.CrtYd) (width 0.05)) + (fp_line (start 6.7 6.7) (end 6.7 -6.7) (layer B.CrtYd) (width 0.05)) + (fp_line (start -6.7 6.7) (end -6.7 -6.7) (layer B.CrtYd) (width 0.05)) + (fp_line (start -5 4) (end -4 5) (layer B.Fab) (width 0.15)) + (fp_line (start -5 -5) (end -5 4) (layer B.Fab) (width 0.15)) + (fp_line (start 5 -5) (end -5 -5) (layer B.Fab) (width 0.15)) + (fp_line (start 5 5) (end 5 -5) (layer B.Fab) (width 0.15)) + (fp_line (start -4 5) (end 5 5) (layer B.Fab) (width 0.15)) + (fp_text user %R (at 0 0 90) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad 64 smd rect (at -3.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 63 smd rect (at -3.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 141 /dvi_out/DATO0)) + (pad 62 smd rect (at -2.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 140 /dvi_out/DATO1)) + (pad 61 smd rect (at -2.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 139 /dvi_out/DATO2)) + (pad 60 smd rect (at -1.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 138 /dvi_out/DATO3)) + (pad 59 smd rect (at -1.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 126 /dvi_out/DATO4)) + (pad 58 smd rect (at -0.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 127 /dvi_out/DATO5)) + (pad 57 smd rect (at -0.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 40 /dvi_out/TXCLK+)) + (pad 56 smd rect (at 0.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 55 smd rect (at 0.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 128 /dvi_out/DATO6)) + (pad 54 smd rect (at 1.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 129 /dvi_out/DATO7)) + (pad 53 smd rect (at 1.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 145 /dvi_out/DATO8)) + (pad 52 smd rect (at 2.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 144 /dvi_out/DATO9)) + (pad 51 smd rect (at 2.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 143 /dvi_out/DATO10)) + (pad 50 smd rect (at 3.25 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 142 /dvi_out/DATO11)) + (pad 49 smd rect (at 3.75 5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 192 "Net-(U501-Pad49)")) + (pad 48 smd rect (at 5.7 3.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 47 smd rect (at 5.7 3.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 130 /dvi_out/DATO12)) + (pad 46 smd rect (at 5.7 2.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 131 /dvi_out/DATO13)) + (pad 45 smd rect (at 5.7 2.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 132 /dvi_out/DATO14)) + (pad 44 smd rect (at 5.7 1.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 133 /dvi_out/DATO15)) + (pad 43 smd rect (at 5.7 1.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 149 /dvi_out/DATO16)) + (pad 42 smd rect (at 5.7 0.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 148 /dvi_out/DATO17)) + (pad 41 smd rect (at 5.7 0.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 147 /dvi_out/DATO18)) + (pad 40 smd rect (at 5.7 -0.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 146 /dvi_out/DATO19)) + (pad 39 smd rect (at 5.7 -0.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 134 /dvi_out/DATO20)) + (pad 38 smd rect (at 5.7 -1.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 135 /dvi_out/DATO21)) + (pad 37 smd rect (at 5.7 -1.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 136 /dvi_out/DATO22)) + (pad 36 smd rect (at 5.7 -2.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 137 /dvi_out/DATO23)) + (pad 35 smd rect (at 5.7 -2.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 158 /dvi_out/DKEN)) + (pad 34 smd rect (at 5.7 -3.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 33 smd rect (at 5.7 -3.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 230 /dvi_out/DVDD)) + (pad 32 smd rect (at 3.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 31 smd rect (at 3.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 193 /dvi_out/TX2+)) + (pad 30 smd rect (at 2.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 194 /dvi_out/TX2-)) + (pad 29 smd rect (at 2.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 8 /dvi_out/TVDD)) + (pad 28 smd rect (at 1.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 195 /dvi_out/TX1+)) + (pad 27 smd rect (at 1.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 196 /dvi_out/TX1-)) + (pad 26 smd rect (at 0.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 25 smd rect (at 0.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 197 /dvi_out/TX0+)) + (pad 24 smd rect (at -0.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 198 /dvi_out/TX0-)) + (pad 23 smd rect (at -0.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 8 /dvi_out/TVDD)) + (pad 22 smd rect (at -1.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 199 /dvi_out/TXC+)) + (pad 21 smd rect (at -1.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 200 /dvi_out/TXC-)) + (pad 20 smd rect (at -2.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 19 smd rect (at -2.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 46 "Net-(R503-Pad2)")) + (pad 18 smd rect (at -3.25 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 231 /dvi_out/PVDD)) + (pad 17 smd rect (at -3.75 -5.7) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 16 smd rect (at -5.7 -3.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 15 smd rect (at -5.7 -3.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 230 /dvi_out/DVDD)) + (pad 14 smd rect (at -5.7 -2.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 13 smd rect (at -5.7 -2.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 12 smd rect (at -5.7 -1.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 230 /dvi_out/DVDD)) + (pad 11 smd rect (at -5.7 -1.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 45 /dvi_out/MSEN)) + (pad 10 smd rect (at -5.7 -0.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 156 /dvi_in/PDOWN)) + (pad 9 smd rect (at -5.7 -0.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 157 /dvi_out/EDGE)) + (pad 8 smd rect (at -5.7 0.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 53 /dvi_out/CTL1)) + (pad 7 smd rect (at -5.7 0.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 57 /dvi_out/CTL2)) + (pad 6 smd rect (at -5.7 1.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 58 /dvi_out/CTL3)) + (pad 5 smd rect (at -5.7 1.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 55 /dvi_out/VSYNC)) + (pad 4 smd rect (at -5.7 2.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 56 /dvi_out/HSYNC)) + (pad 3 smd rect (at -5.7 2.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 44 "Net-(R501-Pad1)")) + (pad 2 smd rect (at -5.7 3.25 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 54 /dvi_out/DE)) + (pad 1 smd rect (at -5.7 3.75 90) (size 1.5 0.3) (layers B.Cu B.Paste B.Mask) + (net 230 /dvi_out/DVDD)) + (pad 65 thru_hole rect (at 0 0 90) (size 5.3 5.3) (drill 3) (layers *.Cu *.Mask) + (net 2 GND)) + (model Housings_QFP.3dshapes/TQFP-64_10x10mm_Pitch0.5mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + (module Capacitors_Tantalum_SMD:Tantalum_Case-D_EIA-7343-31_Hand (layer F.Cu) (tedit 57B6E980) (tstamp 586EAA66) (at 86.91 39.545) (descr "Tantalum capacitor, Case D, EIA 7343-31, 7.3x4.3x2.8mm, Hand soldering footprint") @@ -2258,176 +2428,6 @@ ) ) - (module smd:HQFP-64_10x10mm_Pitch0.5mm_handsoldering (layer B.Cu) (tedit 584FF437) (tstamp 584DB962) - (at 55.25 101.025 90) - (descr "64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [TQFP] (see Microchip Packaging Specification 00000049BS.pdf)") - (tags "QFP 0.5") - (path /583BE4A7/583BE73C) - (attr smd) - (fp_text reference U501 (at 7.75 -7.25 180) (layer B.SilkS) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_text value TFP410 (at 0 -7.45 90) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_text user %R (at 0 0 90) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_line (start -4 5) (end 5 5) (layer B.Fab) (width 0.15)) - (fp_line (start 5 5) (end 5 -5) (layer B.Fab) (width 0.15)) - (fp_line (start 5 -5) (end -5 -5) (layer B.Fab) (width 0.15)) - (fp_line (start -5 -5) (end -5 4) (layer B.Fab) (width 0.15)) - (fp_line (start -5 4) (end -4 5) (layer B.Fab) (width 0.15)) - (fp_line (start -6.7 6.7) (end -6.7 -6.7) (layer B.CrtYd) (width 0.05)) - (fp_line (start 6.7 6.7) (end 6.7 -6.7) (layer B.CrtYd) (width 0.05)) - (fp_line (start -6.7 6.7) (end 6.7 6.7) (layer B.CrtYd) (width 0.05)) - (fp_line (start -6.7 -6.7) (end 6.7 -6.7) (layer B.CrtYd) (width 0.05)) - (fp_line (start -5.175 5.175) (end -5.175 4.225) (layer B.SilkS) (width 0.15)) - (fp_line (start 5.175 5.175) (end 5.175 4.125) (layer B.SilkS) (width 0.15)) - (fp_line (start 5.175 -5.175) (end 5.175 -4.125) (layer B.SilkS) (width 0.15)) - (fp_line (start -5.175 -5.175) (end -5.175 -4.125) (layer B.SilkS) (width 0.15)) - (fp_line (start -5.175 5.175) (end -4.125 5.175) (layer B.SilkS) (width 0.15)) - (fp_line (start -5.175 -5.175) (end -4.125 -5.175) (layer B.SilkS) (width 0.15)) - (fp_line (start 5.175 -5.175) (end 4.125 -5.175) (layer B.SilkS) (width 0.15)) - (fp_line (start 5.175 5.175) (end 4.125 5.175) (layer B.SilkS) (width 0.15)) - (fp_line (start -5.175 4.225) (end -6.45 4.225) (layer B.SilkS) (width 0.15)) - (pad 65 thru_hole rect (at 0 0 90) (size 5.3 5.3) (drill 3) (layers *.Cu *.Mask) - (net 2 GND)) - (pad 1 smd rect (at -5.7 3.75 90) (size 1.5 0.3) (layers B.Cu) - (net 230 /dvi_out/DVDD)) - (pad 2 smd rect (at -5.7 3.25 90) (size 1.5 0.3) (layers B.Cu) - (net 54 /dvi_out/DE)) - (pad 3 smd rect (at -5.7 2.75 90) (size 1.5 0.3) (layers B.Cu) - (net 44 "Net-(R501-Pad1)")) - (pad 4 smd rect (at -5.7 2.25 90) (size 1.5 0.3) (layers B.Cu) - (net 56 /dvi_out/HSYNC)) - (pad 5 smd rect (at -5.7 1.75 90) (size 1.5 0.3) (layers B.Cu) - (net 55 /dvi_out/VSYNC)) - (pad 6 smd rect (at -5.7 1.25 90) (size 1.5 0.3) (layers B.Cu) - (net 58 /dvi_out/CTL3)) - (pad 7 smd rect (at -5.7 0.75 90) (size 1.5 0.3) (layers B.Cu) - (net 57 /dvi_out/CTL2)) - (pad 8 smd rect (at -5.7 0.25 90) (size 1.5 0.3) (layers B.Cu) - (net 53 /dvi_out/CTL1)) - (pad 9 smd rect (at -5.7 -0.25 90) (size 1.5 0.3) (layers B.Cu) - (net 157 /dvi_out/EDGE)) - (pad 10 smd rect (at -5.7 -0.75 90) (size 1.5 0.3) (layers B.Cu) - (net 156 /dvi_in/PDOWN)) - (pad 11 smd rect (at -5.7 -1.25 90) (size 1.5 0.3) (layers B.Cu) - (net 45 /dvi_out/MSEN)) - (pad 12 smd rect (at -5.7 -1.75 90) (size 1.5 0.3) (layers B.Cu) - (net 230 /dvi_out/DVDD)) - (pad 13 smd rect (at -5.7 -2.25 90) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 14 smd rect (at -5.7 -2.75 90) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 15 smd rect (at -5.7 -3.25 90) (size 1.5 0.3) (layers B.Cu) - (net 230 /dvi_out/DVDD)) - (pad 16 smd rect (at -5.7 -3.75 90) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 17 smd rect (at -3.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 18 smd rect (at -3.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 231 /dvi_out/PVDD)) - (pad 19 smd rect (at -2.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 46 "Net-(R503-Pad2)")) - (pad 20 smd rect (at -2.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 21 smd rect (at -1.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 200 /dvi_out/TXC-)) - (pad 22 smd rect (at -1.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 199 /dvi_out/TXC+)) - (pad 23 smd rect (at -0.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 8 /dvi_out/TVDD)) - (pad 24 smd rect (at -0.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 198 /dvi_out/TX0-)) - (pad 25 smd rect (at 0.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 197 /dvi_out/TX0+)) - (pad 26 smd rect (at 0.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 27 smd rect (at 1.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 196 /dvi_out/TX1-)) - (pad 28 smd rect (at 1.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 195 /dvi_out/TX1+)) - (pad 29 smd rect (at 2.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 8 /dvi_out/TVDD)) - (pad 30 smd rect (at 2.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 194 /dvi_out/TX2-)) - (pad 31 smd rect (at 3.25 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 193 /dvi_out/TX2+)) - (pad 32 smd rect (at 3.75 -5.7) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 33 smd rect (at 5.7 -3.75 90) (size 1.5 0.3) (layers B.Cu) - (net 230 /dvi_out/DVDD)) - (pad 34 smd rect (at 5.7 -3.25 90) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 35 smd rect (at 5.7 -2.75 90) (size 1.5 0.3) (layers B.Cu) - (net 158 /dvi_out/DKEN)) - (pad 36 smd rect (at 5.7 -2.25 90) (size 1.5 0.3) (layers B.Cu) - (net 137 /dvi_out/DATO23)) - (pad 37 smd rect (at 5.7 -1.75 90) (size 1.5 0.3) (layers B.Cu) - (net 136 /dvi_out/DATO22)) - (pad 38 smd rect (at 5.7 -1.25 90) (size 1.5 0.3) (layers B.Cu) - (net 135 /dvi_out/DATO21)) - (pad 39 smd rect (at 5.7 -0.75 90) (size 1.5 0.3) (layers B.Cu) - (net 134 /dvi_out/DATO20)) - (pad 40 smd rect (at 5.7 -0.25 90) (size 1.5 0.3) (layers B.Cu) - (net 146 /dvi_out/DATO19)) - (pad 41 smd rect (at 5.7 0.25 90) (size 1.5 0.3) (layers B.Cu) - (net 147 /dvi_out/DATO18)) - (pad 42 smd rect (at 5.7 0.75 90) (size 1.5 0.3) (layers B.Cu) - (net 148 /dvi_out/DATO17)) - (pad 43 smd rect (at 5.7 1.25 90) (size 1.5 0.3) (layers B.Cu) - (net 149 /dvi_out/DATO16)) - (pad 44 smd rect (at 5.7 1.75 90) (size 1.5 0.3) (layers B.Cu) - (net 133 /dvi_out/DATO15)) - (pad 45 smd rect (at 5.7 2.25 90) (size 1.5 0.3) (layers B.Cu) - (net 132 /dvi_out/DATO14)) - (pad 46 smd rect (at 5.7 2.75 90) (size 1.5 0.3) (layers B.Cu) - (net 131 /dvi_out/DATO13)) - (pad 47 smd rect (at 5.7 3.25 90) (size 1.5 0.3) (layers B.Cu) - (net 130 /dvi_out/DATO12)) - (pad 48 smd rect (at 5.7 3.75 90) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 49 smd rect (at 3.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 192 "Net-(U501-Pad49)")) - (pad 50 smd rect (at 3.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 142 /dvi_out/DATO11)) - (pad 51 smd rect (at 2.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 143 /dvi_out/DATO10)) - (pad 52 smd rect (at 2.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 144 /dvi_out/DATO9)) - (pad 53 smd rect (at 1.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 145 /dvi_out/DATO8)) - (pad 54 smd rect (at 1.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 129 /dvi_out/DATO7)) - (pad 55 smd rect (at 0.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 128 /dvi_out/DATO6)) - (pad 56 smd rect (at 0.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (pad 57 smd rect (at -0.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 40 /dvi_out/TXCLK+)) - (pad 58 smd rect (at -0.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 127 /dvi_out/DATO5)) - (pad 59 smd rect (at -1.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 126 /dvi_out/DATO4)) - (pad 60 smd rect (at -1.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 138 /dvi_out/DATO3)) - (pad 61 smd rect (at -2.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 139 /dvi_out/DATO2)) - (pad 62 smd rect (at -2.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 140 /dvi_out/DATO1)) - (pad 63 smd rect (at -3.25 5.7) (size 1.5 0.3) (layers B.Cu) - (net 141 /dvi_out/DATO0)) - (pad 64 smd rect (at -3.75 5.7) (size 1.5 0.3) (layers B.Cu) - (net 2 GND)) - (model Housings_QFP.3dshapes/TQFP-64_10x10mm_Pitch0.5mm.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module dvi:dvi (layer F.Cu) (tedit 0) (tstamp 584DB9AE) (at 27.448 100.81 270) (descr "DVI connector, Tyco P/N 1-1734147-1") @@ -5915,334 +5915,6 @@ ) ) - (module Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm (layer B.Cu) (tedit 54130A77) (tstamp 584DB8AC) - (at 60 75) - (descr "P/PG-TQFP-144-2, -3, -7 (see MAXIM 21-0087.PDF and 90-0144.PDF)") - (tags "QFP 0.5") - (path /583A26B6/583A279E) - (attr smd) - (fp_text reference U302 (at 1.75 12.775) (layer B.SilkS) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_text value EP4CE6E22C8N (at 7.75 -12.5) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_line (start -10.175 9.175) (end -11.275 9.175) (layer B.SilkS) (width 0.15)) - (fp_line (start 10.175 10.175) (end 9.1 10.175) (layer B.SilkS) (width 0.15)) - (fp_line (start 10.175 -10.175) (end 9.1 -10.175) (layer B.SilkS) (width 0.15)) - (fp_line (start -10.175 -10.175) (end -9.1 -10.175) (layer B.SilkS) (width 0.15)) - (fp_line (start -10.175 10.175) (end -9.1 10.175) (layer B.SilkS) (width 0.15)) - (fp_line (start -10.175 -10.175) (end -10.175 -9.1) (layer B.SilkS) (width 0.15)) - (fp_line (start 10.175 -10.175) (end 10.175 -9.1) (layer B.SilkS) (width 0.15)) - (fp_line (start 10.175 10.175) (end 10.175 9.1) (layer B.SilkS) (width 0.15)) - (fp_line (start -10.175 10.175) (end -10.175 9.175) (layer B.SilkS) (width 0.15)) - (fp_line (start -11.55 -11.55) (end 11.55 -11.55) (layer B.CrtYd) (width 0.05)) - (fp_line (start -11.55 11.55) (end 11.55 11.55) (layer B.CrtYd) (width 0.05)) - (fp_line (start 11.55 11.55) (end 11.55 -11.55) (layer B.CrtYd) (width 0.05)) - (fp_line (start -11.55 11.55) (end -11.55 -11.55) (layer B.CrtYd) (width 0.05)) - (fp_line (start -10 9) (end -9 10) (layer B.Fab) (width 0.15)) - (fp_line (start -10 -10) (end -10 9) (layer B.Fab) (width 0.15)) - (fp_line (start 10 -10) (end -10 -10) (layer B.Fab) (width 0.15)) - (fp_line (start 10 10) (end 10 -10) (layer B.Fab) (width 0.15)) - (fp_line (start -9 10) (end 10 10) (layer B.Fab) (width 0.15)) - (fp_text user %R (at -0.127 1.651) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (pad 144 smd rect (at -8.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 137 /dvi_out/DATO23)) - (pad 143 smd rect (at -8.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 136 /dvi_out/DATO22)) - (pad 142 smd rect (at -7.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 135 /dvi_out/DATO21)) - (pad 141 smd rect (at -7.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 134 /dvi_out/DATO20)) - (pad 140 smd rect (at -6.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 139 smd rect (at -6.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 138 smd rect (at -5.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 146 /dvi_out/DATO19)) - (pad 137 smd rect (at -5.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 147 /dvi_out/DATO18)) - (pad 136 smd rect (at -4.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 148 /dvi_out/DATO17)) - (pad 135 smd rect (at -4.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 149 /dvi_out/DATO16)) - (pad 134 smd rect (at -3.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 133 smd rect (at -3.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 133 /dvi_out/DATO15)) - (pad 132 smd rect (at -2.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 132 /dvi_out/DATO14)) - (pad 131 smd rect (at -2.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 130 smd rect (at -1.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 129 smd rect (at -1.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 131 /dvi_out/DATO13)) - (pad 128 smd rect (at -0.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 130 /dvi_out/DATO12)) - (pad 127 smd rect (at -0.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 154 "Net-(U302-Pad127)")) - (pad 126 smd rect (at 0.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 142 /dvi_out/DATO11)) - (pad 125 smd rect (at 0.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 143 /dvi_out/DATO10)) - (pad 124 smd rect (at 1.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 144 /dvi_out/DATO9)) - (pad 123 smd rect (at 1.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 122 smd rect (at 2.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 121 smd rect (at 2.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 145 /dvi_out/DATO8)) - (pad 120 smd rect (at 3.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 129 /dvi_out/DATO7)) - (pad 119 smd rect (at 3.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 128 /dvi_out/DATO6)) - (pad 118 smd rect (at 4.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 117 smd rect (at 4.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 116 smd rect (at 5.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 115 smd rect (at 5.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 127 /dvi_out/DATO5)) - (pad 114 smd rect (at 6.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 126 /dvi_out/DATO4)) - (pad 113 smd rect (at 6.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 138 /dvi_out/DATO3)) - (pad 112 smd rect (at 7.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 139 /dvi_out/DATO2)) - (pad 111 smd rect (at 7.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 140 /dvi_out/DATO1)) - (pad 110 smd rect (at 8.25 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 141 /dvi_out/DATO0)) - (pad 109 smd rect (at 8.75 10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 108 smd rect (at 10.55 8.75) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 107 smd rect (at 10.55 8.25) (size 1.45 0.25) (layers B.Cu) - (net 4 +2V5)) - (pad 106 smd rect (at 10.55 7.75) (size 1.45 0.25) (layers B.Cu) - (net 51 "Net-(RN301-Pad5)")) - (pad 105 smd rect (at 10.55 7.25) (size 1.45 0.25) (layers B.Cu) - (net 50 "Net-(RN301-Pad6)")) - (pad 104 smd rect (at 10.55 6.75) (size 1.45 0.25) (layers B.Cu) - (net 49 "Net-(RN301-Pad7)")) - (pad 103 smd rect (at 10.55 6.25) (size 1.45 0.25) (layers B.Cu) - (net 60 "Net-(RN302-Pad5)")) - (pad 102 smd rect (at 10.55 5.75) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 101 smd rect (at 10.55 5.25) (size 1.45 0.25) (layers B.Cu) - (net 61 "Net-(RN302-Pad6)")) - (pad 100 smd rect (at 10.55 4.75) (size 1.45 0.25) (layers B.Cu) - (net 62 "Net-(RN302-Pad7)")) - (pad 99 smd rect (at 10.55 4.25) (size 1.45 0.25) (layers B.Cu) - (net 219 "Net-(U302-Pad99)")) - (pad 98 smd rect (at 10.55 3.75) (size 1.45 0.25) (layers B.Cu) - (net 18 /GPIO5)) - (pad 97 smd rect (at 10.55 3.25) (size 1.45 0.25) (layers B.Cu) - (net 37 "Net-(R306-Pad1)")) - (pad 96 smd rect (at 10.55 2.75) (size 1.45 0.25) (layers B.Cu) - (net 35 "Net-(R304-Pad1)")) - (pad 95 smd rect (at 10.55 2.25) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 94 smd rect (at 10.55 1.75) (size 1.45 0.25) (layers B.Cu) - (net 34 "Net-(R303-Pad1)")) - (pad 93 smd rect (at 10.55 1.25) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 92 smd rect (at 10.55 0.75) (size 1.45 0.25) (layers B.Cu) - (net 36 "Net-(R305-Pad1)")) - (pad 91 smd rect (at 10.55 0.25) (size 1.45 0.25) (layers B.Cu) - (net 17 /GPIO4)) - (pad 90 smd rect (at 10.55 -0.25) (size 1.45 0.25) (layers B.Cu) - (net 16 /GPIO3)) - (pad 89 smd rect (at 10.55 -0.75) (size 1.45 0.25) (layers B.Cu) - (net 42 /fpga/CLKIN)) - (pad 88 smd rect (at 10.55 -1.25) (size 1.45 0.25) (layers B.Cu) - (net 217 "Net-(D303-Pad2)")) - (pad 87 smd rect (at 10.55 -1.75) (size 1.45 0.25) (layers B.Cu) - (net 65 /dvi_in/HSYNC)) - (pad 86 smd rect (at 10.55 -2.25) (size 1.45 0.25) (layers B.Cu) - (net 64 /dvi_in/VSYNC)) - (pad 85 smd rect (at 10.55 -2.75) (size 1.45 0.25) (layers B.Cu) - (net 63 /dvi_in/DE)) - (pad 84 smd rect (at 10.55 -3.25) (size 1.45 0.25) (layers B.Cu) - (net 220 "Net-(U302-Pad84)")) - (pad 83 smd rect (at 10.55 -3.75) (size 1.45 0.25) (layers B.Cu) - (net 221 "Net-(U302-Pad83)")) - (pad 82 smd rect (at 10.55 -4.25) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 81 smd rect (at 10.55 -4.75) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 80 smd rect (at 10.55 -5.25) (size 1.45 0.25) (layers B.Cu) - (net 99 /dvi_in/CTL3)) - (pad 79 smd rect (at 10.55 -5.75) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 78 smd rect (at 10.55 -6.25) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 77 smd rect (at 10.55 -6.75) (size 1.45 0.25) (layers B.Cu) - (net 100 /dvi_in/CTL2)) - (pad 76 smd rect (at 10.55 -7.25) (size 1.45 0.25) (layers B.Cu) - (net 101 /dvi_in/CTL1)) - (pad 75 smd rect (at 10.55 -7.75) (size 1.45 0.25) (layers B.Cu) - (net 121 /dvi_in/DATI23)) - (pad 74 smd rect (at 10.55 -8.25) (size 1.45 0.25) (layers B.Cu) - (net 120 /dvi_in/DATI22)) - (pad 73 smd rect (at 10.55 -8.75) (size 1.45 0.25) (layers B.Cu) - (net 119 /dvi_in/DATI21)) - (pad 72 smd rect (at 8.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 118 /dvi_in/DATI20)) - (pad 71 smd rect (at 8.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 91 /dvi_in/DATI19)) - (pad 70 smd rect (at 7.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 92 /dvi_in/DATI18)) - (pad 69 smd rect (at 7.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 93 /dvi_in/DATI17)) - (pad 68 smd rect (at 6.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 94 /dvi_in/DATI16)) - (pad 67 smd rect (at 6.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 113 /dvi_in/DATI15)) - (pad 66 smd rect (at 5.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 112 /dvi_in/DATI14)) - (pad 65 smd rect (at 5.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 111 /dvi_in/DATI13)) - (pad 64 smd rect (at 4.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 110 /dvi_in/DATI12)) - (pad 63 smd rect (at 4.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 62 smd rect (at 3.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 61 smd rect (at 3.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 60 smd rect (at 2.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 83 /dvi_in/DATI11)) - (pad 59 smd rect (at 2.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 84 /dvi_in/DATI10)) - (pad 58 smd rect (at 1.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 85 /dvi_in/DATI9)) - (pad 57 smd rect (at 1.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 56 smd rect (at 0.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 55 smd rect (at 0.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 86 /dvi_in/DATI8)) - (pad 54 smd rect (at -0.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 105 /dvi_in/DATI7)) - (pad 53 smd rect (at -0.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 104 /dvi_in/DATI6)) - (pad 52 smd rect (at -1.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 103 /dvi_in/DATI5)) - (pad 51 smd rect (at -1.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 102 /dvi_in/DATI4)) - (pad 50 smd rect (at -2.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 75 /dvi_in/DATI3)) - (pad 49 smd rect (at -2.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 76 /dvi_in/DATI2)) - (pad 48 smd rect (at -3.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 47 smd rect (at -3.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 46 smd rect (at -4.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 77 /dvi_in/DATI1)) - (pad 45 smd rect (at -4.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 44 smd rect (at -5.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 78 /dvi_in/DATI0)) - (pad 43 smd rect (at -5.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 41 "Net-(R308-Pad1)")) - (pad 42 smd rect (at -6.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 215 "Net-(D301-Pad2)")) - (pad 41 smd rect (at -6.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 40 smd rect (at -7.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 39 smd rect (at -7.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 216 "Net-(D302-Pad2)")) - (pad 38 smd rect (at -8.25 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 155 /dvi_in/LINK_ACT)) - (pad 37 smd rect (at -8.75 -10.55 270) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 36 smd rect (at -10.55 -8.75) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 35 smd rect (at -10.55 -8.25) (size 1.45 0.25) (layers B.Cu) - (net 4 +2V5)) - (pad 34 smd rect (at -10.55 -7.75) (size 1.45 0.25) (layers B.Cu) - (net 20 /GPIO7)) - (pad 33 smd rect (at -10.55 -7.25) (size 1.45 0.25) (layers B.Cu) - (net 47 /dvi_out/HOTPLUG)) - (pad 32 smd rect (at -10.55 -6.75) (size 1.45 0.25) (layers B.Cu) - (net 43 /dvi_in/HOTPLUG)) - (pad 31 smd rect (at -10.55 -6.25) (size 1.45 0.25) (layers B.Cu) - (net 31 /dvi_out/DDCCLK)) - (pad 30 smd rect (at -10.55 -5.75) (size 1.45 0.25) (layers B.Cu) - (net 30 /dvi_out/DDCDAT)) - (pad 29 smd rect (at -10.55 -5.25) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 28 smd rect (at -10.55 -4.75) (size 1.45 0.25) (layers B.Cu) - (net 29 /dvi_in/DDCCLK_IN)) - (pad 27 smd rect (at -10.55 -4.25) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 26 smd rect (at -10.55 -3.75) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 25 smd rect (at -10.55 -3.25) (size 1.45 0.25) (layers B.Cu) - (net 28 /dvi_in/DDCDAT_IN)) - (pad 24 smd rect (at -10.55 -2.75) (size 1.45 0.25) (layers B.Cu) - (net 38 /fpga/CLK50)) - (pad 23 smd rect (at -10.55 -2.25) (size 1.45 0.25) (layers B.Cu) - (net 19 /GPIO6)) - (pad 22 smd rect (at -10.55 -1.75) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 21 smd rect (at -10.55 -1.25) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 20 smd rect (at -10.55 -0.75) (size 1.45 0.25) (layers B.Cu) - (net 26 "Net-(P301-Pad3)")) - (pad 19 smd rect (at -10.55 -0.25) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 18 smd rect (at -10.55 0.25) (size 1.45 0.25) (layers B.Cu) - (net 25 "Net-(P301-Pad5)")) - (pad 17 smd rect (at -10.55 0.75) (size 1.45 0.25) (layers B.Cu) - (net 7 +V_IO)) - (pad 16 smd rect (at -10.55 1.25) (size 1.45 0.25) (layers B.Cu) - (net 27 "Net-(P301-Pad1)")) - (pad 15 smd rect (at -10.55 1.75) (size 1.45 0.25) (layers B.Cu) - (net 21 "Net-(P301-Pad9)")) - (pad 14 smd rect (at -10.55 2.25) (size 1.45 0.25) (layers B.Cu) - (net 33 "Net-(R302-Pad1)")) - (pad 13 smd rect (at -10.55 2.75) (size 1.45 0.25) (layers B.Cu) - (net 152 /fpga/DATA)) - (pad 12 smd rect (at -10.55 3.25) (size 1.45 0.25) (layers B.Cu) - (net 150 /fpga/DCLK)) - (pad 11 smd rect (at -10.55 3.75) (size 1.45 0.25) (layers B.Cu) - (net 15 /GPIO2)) - (pad 10 smd rect (at -10.55 4.25) (size 1.45 0.25) (layers B.Cu) - (net 14 /GPIO1)) - (pad 9 smd rect (at -10.55 4.75) (size 1.45 0.25) (layers B.Cu) - (net 32 "Net-(R301-Pad1)")) - (pad 8 smd rect (at -10.55 5.25) (size 1.45 0.25) (layers B.Cu) - (net 153 /fpga/nCS)) - (pad 7 smd rect (at -10.55 5.75) (size 1.45 0.25) (layers B.Cu) - (net 13 /GPIO0)) - (pad 6 smd rect (at -10.55 6.25) (size 1.45 0.25) (layers B.Cu) - (net 151 /fpga/ASDI)) - (pad 5 smd rect (at -10.55 6.75) (size 1.45 0.25) (layers B.Cu) - (net 6 +1V2)) - (pad 4 smd rect (at -10.55 7.25) (size 1.45 0.25) (layers B.Cu) - (net 2 GND)) - (pad 3 smd rect (at -10.55 7.75) (size 1.45 0.25) (layers B.Cu) - (net 156 /dvi_in/PDOWN)) - (pad 2 smd rect (at -10.55 8.25) (size 1.45 0.25) (layers B.Cu) - (net 157 /dvi_out/EDGE)) - (pad 1 smd rect (at -10.55 8.75) (size 1.45 0.25) (layers B.Cu) - (net 158 /dvi_out/DKEN)) - (model Housings_QFP.3dshapes/TQFP-144_20x20mm_Pitch0.5mm.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module smd:Oscillator-SMD (layer F.Cu) (tedit 56D83549) (tstamp 584DB8B4) (at 39.35 57.5) (descr http://www.tme.eu/en/Document/04fa0ef07f38450711886bdf482cf79c/ISM92_Series.pdf) @@ -7297,7 +6969,335 @@ (net 5 +3V3)) ) - (gr_text "V1.2\n" (at 77.29 105.905) (layer F.Mask) + (module smd:TQFP-144_20x20mm_Pitch0.5mm (layer B.Cu) (tedit 587686CB) (tstamp 587716FC) + (at 60 75) + (descr "P/PG-TQFP-144-2, -3, -7 (see MAXIM 21-0087.PDF and 90-0144.PDF)") + (tags "QFP 0.5") + (path /583A26B6/583A279E) + (attr smd) + (fp_text reference U302 (at 1.75 12.775) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value EP4CE6E22C8N (at 7.75 -12.5) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -10.175 9.175) (end -11.275 9.175) (layer B.SilkS) (width 0.15)) + (fp_line (start 10.175 10.175) (end 9.1 10.175) (layer B.SilkS) (width 0.15)) + (fp_line (start 10.175 -10.175) (end 9.1 -10.175) (layer B.SilkS) (width 0.15)) + (fp_line (start -10.175 -10.175) (end -9.1 -10.175) (layer B.SilkS) (width 0.15)) + (fp_line (start -10.175 10.175) (end -9.1 10.175) (layer B.SilkS) (width 0.15)) + (fp_line (start -10.175 -10.175) (end -10.175 -9.1) (layer B.SilkS) (width 0.15)) + (fp_line (start 10.175 -10.175) (end 10.175 -9.1) (layer B.SilkS) (width 0.15)) + (fp_line (start 10.175 10.175) (end 10.175 9.1) (layer B.SilkS) (width 0.15)) + (fp_line (start -10.175 10.175) (end -10.175 9.175) (layer B.SilkS) (width 0.15)) + (fp_line (start -11.55 -11.55) (end 11.55 -11.55) (layer B.CrtYd) (width 0.05)) + (fp_line (start -11.55 11.55) (end 11.55 11.55) (layer B.CrtYd) (width 0.05)) + (fp_line (start 11.55 11.55) (end 11.55 -11.55) (layer B.CrtYd) (width 0.05)) + (fp_line (start -11.55 11.55) (end -11.55 -11.55) (layer B.CrtYd) (width 0.05)) + (fp_line (start -10 9) (end -9 10) (layer B.Fab) (width 0.15)) + (fp_line (start -10 -10) (end -10 9) (layer B.Fab) (width 0.15)) + (fp_line (start 10 -10) (end -10 -10) (layer B.Fab) (width 0.15)) + (fp_line (start 10 10) (end 10 -10) (layer B.Fab) (width 0.15)) + (fp_line (start -9 10) (end 10 10) (layer B.Fab) (width 0.15)) + (fp_text user %R (at -0.127 1.651) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad 144 smd rect (at -8.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 137 /dvi_out/DATO23)) + (pad 143 smd rect (at -8.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 136 /dvi_out/DATO22)) + (pad 142 smd rect (at -7.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 135 /dvi_out/DATO21)) + (pad 141 smd rect (at -7.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 134 /dvi_out/DATO20)) + (pad 140 smd rect (at -6.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 139 smd rect (at -6.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 138 smd rect (at -5.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 146 /dvi_out/DATO19)) + (pad 137 smd rect (at -5.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 147 /dvi_out/DATO18)) + (pad 136 smd rect (at -4.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 148 /dvi_out/DATO17)) + (pad 135 smd rect (at -4.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 149 /dvi_out/DATO16)) + (pad 134 smd rect (at -3.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 133 smd rect (at -3.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 133 /dvi_out/DATO15)) + (pad 132 smd rect (at -2.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 132 /dvi_out/DATO14)) + (pad 131 smd rect (at -2.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 130 smd rect (at -1.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 129 smd rect (at -1.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 131 /dvi_out/DATO13)) + (pad 128 smd rect (at -0.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 130 /dvi_out/DATO12)) + (pad 127 smd rect (at -0.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 154 "Net-(U302-Pad127)")) + (pad 126 smd rect (at 0.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 142 /dvi_out/DATO11)) + (pad 125 smd rect (at 0.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 143 /dvi_out/DATO10)) + (pad 124 smd rect (at 1.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 144 /dvi_out/DATO9)) + (pad 123 smd rect (at 1.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 122 smd rect (at 2.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 121 smd rect (at 2.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 145 /dvi_out/DATO8)) + (pad 120 smd rect (at 3.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 129 /dvi_out/DATO7)) + (pad 119 smd rect (at 3.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 128 /dvi_out/DATO6)) + (pad 118 smd rect (at 4.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 117 smd rect (at 4.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 116 smd rect (at 5.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 115 smd rect (at 5.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 127 /dvi_out/DATO5)) + (pad 114 smd rect (at 6.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 126 /dvi_out/DATO4)) + (pad 113 smd rect (at 6.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 138 /dvi_out/DATO3)) + (pad 112 smd rect (at 7.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 139 /dvi_out/DATO2)) + (pad 111 smd rect (at 7.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 140 /dvi_out/DATO1)) + (pad 110 smd rect (at 8.25 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 141 /dvi_out/DATO0)) + (pad 109 smd rect (at 8.75 10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 108 smd rect (at 10.55 8.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 107 smd rect (at 10.55 8.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 4 +2V5)) + (pad 106 smd rect (at 10.55 7.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 51 "Net-(RN301-Pad5)")) + (pad 105 smd rect (at 10.55 7.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 50 "Net-(RN301-Pad6)")) + (pad 104 smd rect (at 10.55 6.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 49 "Net-(RN301-Pad7)")) + (pad 103 smd rect (at 10.55 6.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 60 "Net-(RN302-Pad5)")) + (pad 102 smd rect (at 10.55 5.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 101 smd rect (at 10.55 5.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 61 "Net-(RN302-Pad6)")) + (pad 100 smd rect (at 10.55 4.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 62 "Net-(RN302-Pad7)")) + (pad 99 smd rect (at 10.55 4.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 219 "Net-(U302-Pad99)")) + (pad 98 smd rect (at 10.55 3.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 18 /GPIO5)) + (pad 97 smd rect (at 10.55 3.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 37 "Net-(R306-Pad1)")) + (pad 96 smd rect (at 10.55 2.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 35 "Net-(R304-Pad1)")) + (pad 95 smd rect (at 10.55 2.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 94 smd rect (at 10.55 1.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 34 "Net-(R303-Pad1)")) + (pad 93 smd rect (at 10.55 1.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 92 smd rect (at 10.55 0.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 36 "Net-(R305-Pad1)")) + (pad 91 smd rect (at 10.55 0.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 17 /GPIO4)) + (pad 90 smd rect (at 10.55 -0.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 16 /GPIO3)) + (pad 89 smd rect (at 10.55 -0.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 42 /fpga/CLKIN)) + (pad 88 smd rect (at 10.55 -1.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 217 "Net-(D303-Pad2)")) + (pad 87 smd rect (at 10.55 -1.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 65 /dvi_in/HSYNC)) + (pad 86 smd rect (at 10.55 -2.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 64 /dvi_in/VSYNC)) + (pad 85 smd rect (at 10.55 -2.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 63 /dvi_in/DE)) + (pad 84 smd rect (at 10.55 -3.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 220 "Net-(U302-Pad84)")) + (pad 83 smd rect (at 10.55 -3.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 221 "Net-(U302-Pad83)")) + (pad 82 smd rect (at 10.55 -4.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 81 smd rect (at 10.55 -4.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 80 smd rect (at 10.55 -5.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 99 /dvi_in/CTL3)) + (pad 79 smd rect (at 10.55 -5.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 78 smd rect (at 10.55 -6.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 77 smd rect (at 10.55 -6.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 100 /dvi_in/CTL2)) + (pad 76 smd rect (at 10.55 -7.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 101 /dvi_in/CTL1)) + (pad 75 smd rect (at 10.55 -7.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 121 /dvi_in/DATI23)) + (pad 74 smd rect (at 10.55 -8.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 120 /dvi_in/DATI22)) + (pad 73 smd rect (at 10.55 -8.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 119 /dvi_in/DATI21)) + (pad 72 smd rect (at 8.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 118 /dvi_in/DATI20)) + (pad 71 smd rect (at 8.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 91 /dvi_in/DATI19)) + (pad 70 smd rect (at 7.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 92 /dvi_in/DATI18)) + (pad 69 smd rect (at 7.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 93 /dvi_in/DATI17)) + (pad 68 smd rect (at 6.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 94 /dvi_in/DATI16)) + (pad 67 smd rect (at 6.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 113 /dvi_in/DATI15)) + (pad 66 smd rect (at 5.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 112 /dvi_in/DATI14)) + (pad 65 smd rect (at 5.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 111 /dvi_in/DATI13)) + (pad 64 smd rect (at 4.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 110 /dvi_in/DATI12)) + (pad 63 smd rect (at 4.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 62 smd rect (at 3.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 61 smd rect (at 3.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 60 smd rect (at 2.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 83 /dvi_in/DATI11)) + (pad 59 smd rect (at 2.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 84 /dvi_in/DATI10)) + (pad 58 smd rect (at 1.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 85 /dvi_in/DATI9)) + (pad 57 smd rect (at 1.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 56 smd rect (at 0.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 55 smd rect (at 0.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 86 /dvi_in/DATI8)) + (pad 54 smd rect (at -0.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 105 /dvi_in/DATI7)) + (pad 53 smd rect (at -0.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 104 /dvi_in/DATI6)) + (pad 52 smd rect (at -1.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 103 /dvi_in/DATI5)) + (pad 51 smd rect (at -1.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 102 /dvi_in/DATI4)) + (pad 50 smd rect (at -2.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 75 /dvi_in/DATI3)) + (pad 49 smd rect (at -2.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 76 /dvi_in/DATI2)) + (pad 48 smd rect (at -3.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 47 smd rect (at -3.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 46 smd rect (at -4.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 77 /dvi_in/DATI1)) + (pad 45 smd rect (at -4.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 44 smd rect (at -5.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 78 /dvi_in/DATI0)) + (pad 43 smd rect (at -5.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 41 "Net-(R308-Pad1)")) + (pad 42 smd rect (at -6.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 215 "Net-(D301-Pad2)")) + (pad 41 smd rect (at -6.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 40 smd rect (at -7.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 39 smd rect (at -7.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 216 "Net-(D302-Pad2)")) + (pad 38 smd rect (at -8.25 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 155 /dvi_in/LINK_ACT)) + (pad 37 smd rect (at -8.75 -10.55 270) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 36 smd rect (at -10.55 -8.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 35 smd rect (at -10.55 -8.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 4 +2V5)) + (pad 34 smd rect (at -10.55 -7.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 20 /GPIO7)) + (pad 33 smd rect (at -10.55 -7.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 47 /dvi_out/HOTPLUG)) + (pad 32 smd rect (at -10.55 -6.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 43 /dvi_in/HOTPLUG)) + (pad 31 smd rect (at -10.55 -6.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 31 /dvi_out/DDCCLK)) + (pad 30 smd rect (at -10.55 -5.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 30 /dvi_out/DDCDAT)) + (pad 29 smd rect (at -10.55 -5.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 28 smd rect (at -10.55 -4.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 29 /dvi_in/DDCCLK_IN)) + (pad 27 smd rect (at -10.55 -4.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 26 smd rect (at -10.55 -3.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 25 smd rect (at -10.55 -3.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 28 /dvi_in/DDCDAT_IN)) + (pad 24 smd rect (at -10.55 -2.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 38 /fpga/CLK50)) + (pad 23 smd rect (at -10.55 -2.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 19 /GPIO6)) + (pad 22 smd rect (at -10.55 -1.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 21 smd rect (at -10.55 -1.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 20 smd rect (at -10.55 -0.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 26 "Net-(P301-Pad3)")) + (pad 19 smd rect (at -10.55 -0.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 18 smd rect (at -10.55 0.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 25 "Net-(P301-Pad5)")) + (pad 17 smd rect (at -10.55 0.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 7 +V_IO)) + (pad 16 smd rect (at -10.55 1.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 27 "Net-(P301-Pad1)")) + (pad 15 smd rect (at -10.55 1.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 21 "Net-(P301-Pad9)")) + (pad 14 smd rect (at -10.55 2.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 33 "Net-(R302-Pad1)")) + (pad 13 smd rect (at -10.55 2.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 152 /fpga/DATA)) + (pad 12 smd rect (at -10.55 3.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 150 /fpga/DCLK)) + (pad 11 smd rect (at -10.55 3.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 15 /GPIO2)) + (pad 10 smd rect (at -10.55 4.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 14 /GPIO1)) + (pad 9 smd rect (at -10.55 4.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 32 "Net-(R301-Pad1)")) + (pad 8 smd rect (at -10.55 5.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 153 /fpga/nCS)) + (pad 7 smd rect (at -10.55 5.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 13 /GPIO0)) + (pad 6 smd rect (at -10.55 6.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 151 /fpga/ASDI)) + (pad 5 smd rect (at -10.55 6.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 6 +1V2)) + (pad 4 smd rect (at -10.55 7.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 3 smd rect (at -10.55 7.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 156 /dvi_in/PDOWN)) + (pad 2 smd rect (at -10.55 8.25) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 157 /dvi_out/EDGE)) + (pad 1 smd rect (at -10.55 8.75) (size 1.45 0.25) (layers B.Cu B.Paste B.Mask) + (net 158 /dvi_out/DKEN)) + (model Housings_QFP.3dshapes/TQFP-144_20x20mm_Pitch0.5mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (gr_text "V1.2-fix\n" (at 77.29 105.905) (layer F.Mask) (effects (font (size 1.5 1.5) (thickness 0.3))) ) (gr_text "DVI-SNIFFER 01/2017\nMario Hüttel" (at 89.5 103.525) (layer F.Mask) diff --git a/dvi-sniffer.net b/dvi-sniffer.net index ce43f5b..ee87a76 100644 --- a/dvi-sniffer.net +++ b/dvi-sniffer.net @@ -1,7 +1,7 @@ (export (version D) (design - (source /home/mari/projects/pcb/dvi-sniffer/dvi-sniffer.sch) - (date "Sun 08 Jan 2017 10:13:03 PM CET") + (source /home/mari/projects/pcb/dvi-fpga/dvi-sniffer.sch) + (date "Wed 11 Jan 2017 08:27:36 PM CET") (tool "Eeschema (2016-12-16 revision f631ae27b)-master") (sheet (number 1) (name /) (tstamps /) (title_block @@ -187,7 +187,7 @@ (tstamp 584D4385)) (comp (ref U302) (value EP4CE6E22C8N) - (footprint Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm) + (footprint smd:TQFP-144_20x20mm_Pitch0.5mm) (libsource (lib altera) (part EP4CE6E22C8N)) (sheetpath (names /fpga/) (tstamps /583A26B6/)) (tstamp 583A279E)) @@ -1482,24 +1482,24 @@ (pin (num 64) (name DGND) (type power_in)) (pin (num 65) (name PAD) (type power_in))))) (libraries + (library (logical memory) + (uri /usr/share/kicad/library/memory.lib)) (library (logical conn) (uri /usr/share/kicad/library/conn.lib)) (library (logical device) (uri /usr/share/kicad/library/device.lib)) - (library (logical ti) - (uri /home/mari/projects/pcb/shimattapcblibs/schematics/ti/ti.lib)) - (library (logical memory) - (uri /usr/share/kicad/library/memory.lib)) (library (logical regul) (uri /usr/share/kicad/library/regul.lib)) - (library (logical osc) - (uri /home/mari/projects/pcb/shimattapcblibs/schematics/passives/osc.lib)) + (library (logical ti) + (uri /home/mari/projects/pcb/shimattapcblibs/schematics/ti/ti.lib)) (library (logical altera) (uri /home/mari/projects/pcb/shimattapcblibs/schematics/altera/altera.lib)) + (library (logical con-molex) + (uri /home/mari/projects/pcb/dvi-fpga/con-molex.lib)) (library (logical regulators) (uri /home/mari/projects/pcb/shimattapcblibs/schematics/power/regulators.lib)) - (library (logical con-molex) - (uri /home/mari/projects/pcb/dvi-sniffer/con-molex.lib))) + (library (logical osc) + (uri /home/mari/projects/pcb/shimattapcblibs/schematics/passives/osc.lib))) (nets (net (code 1) (name /dvi_out/TXCLK+) (node (ref U501) (pin 57)) diff --git a/dvi_out.sch b/dvi_out.sch index e415507..24a4a79 100644 --- a/dvi_out.sch +++ b/dvi_out.sch @@ -1103,10 +1103,10 @@ F 3 "" H 4950 1300 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L GND #PWR? +L GND #PWR093 U 1 1 5872B1F7 P 5100 3400 -F 0 "#PWR?" H 5100 3150 50 0001 C CNN +F 0 "#PWR093" H 5100 3150 50 0001 C CNN F 1 "GND" V 5105 3272 50 0000 R CNN F 2 "" H 5100 3400 50 0000 C CNN F 3 "" H 5100 3400 50 0000 C CNN diff --git a/fpga.sch b/fpga.sch index 80c60d3..bb03f5e 100644 --- a/fpga.sch +++ b/fpga.sch @@ -56,7 +56,7 @@ U 1 1 583A279E P 1700 2650 F 0 "U302" H 2175 4547 60 0000 C CNN F 1 "EP4CE6E22C8N" H 2175 4441 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 1700 2600 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 1700 2600 60 0001 C CNN F 3 "" H 1700 2600 60 0000 C CNN 1 1700 2650 1 0 0 -1 @@ -67,7 +67,7 @@ U 2 1 583A281F P 4150 2750 F 0 "U302" H 4650 3947 60 0000 C CNN F 1 "EP4CE6E22C8N" H 4650 3841 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 4150 2700 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 4150 2700 60 0001 C CNN F 3 "" H 4150 2700 60 0000 C CNN 2 4150 2750 1 0 0 -1 @@ -78,7 +78,7 @@ U 3 1 583A28B1 P 9550 6000 F 0 "U302" H 10050 6997 60 0000 C CNN F 1 "EP4CE6E22C8N" H 10050 6891 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9550 5950 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9550 5950 60 0001 C CNN F 3 "" H 9550 5950 60 0000 C CNN 3 9550 6000 1 0 0 -1 @@ -89,7 +89,7 @@ U 4 1 583A295F P 9250 3300 F 0 "U302" H 9850 4597 60 0000 C CNN F 1 "EP4CE6E22C8N" H 9850 4491 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9250 3250 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9250 3250 60 0001 C CNN F 3 "" H 9250 3250 60 0000 C CNN 4 9250 3300 1 0 0 -1 @@ -100,7 +100,7 @@ U 6 1 583A2ACD P 6600 2100 F 0 "U302" H 7025 3597 60 0000 C CNN F 1 "EP4CE6E22C8N" H 7025 3491 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 6600 2050 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 6600 2050 60 0001 C CNN F 3 "" H 6600 2050 60 0000 C CNN 6 6600 2100 1 0 0 -1 @@ -111,7 +111,7 @@ U 7 1 583A2BA1 P 6650 4550 F 0 "U302" H 7250 5747 60 0000 C CNN F 1 "EP4CE6E22C8N" H 7250 5641 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 6650 4500 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 6650 4500 60 0001 C CNN F 3 "" H 6650 4500 60 0000 C CNN 7 6650 4550 1 0 0 -1 @@ -122,7 +122,7 @@ U 8 1 583A2C7D P 9200 4900 F 0 "U302" H 9750 6397 60 0000 C CNN F 1 "EP4CE6E22C8N" H 9750 6291 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9200 4850 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9200 4850 60 0001 C CNN F 3 "" H 9200 4850 60 0000 C CNN 8 9200 4900 1 0 0 -1 @@ -133,7 +133,7 @@ U 9 1 583A2D4F P 9250 1950 F 0 "U302" H 9850 3347 60 0000 C CNN F 1 "EP4CE6E22C8N" H 9850 3241 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9250 1900 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9250 1900 60 0001 C CNN F 3 "" H 9250 1900 60 0000 C CNN 9 9250 1950 1 0 0 -1 @@ -144,7 +144,7 @@ U 10 1 583A2EA1 P 3800 4550 F 0 "U302" H 4378 5283 60 0000 L CNN F 1 "EP4CE6E22C8N" H 4378 5177 60 0000 L CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 3800 4500 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 3800 4500 60 0001 C CNN F 3 "" H 3800 4500 60 0000 C CNN 10 3800 4550 1 0 0 -1 @@ -360,7 +360,7 @@ U 5 1 583A2A03 P 6650 6200 F 0 "U302" H 7175 7797 60 0000 C CNN F 1 "EP4CE6E22C8N" H 7175 7691 60 0000 C CNN -F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 6650 6150 60 0001 C CNN +F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 6650 6150 60 0001 C CNN F 3 "" H 6650 6150 60 0000 C CNN 5 6650 6200 1 0 0 -1