diff --git a/fm-amp-cache.lib b/fm-amp-cache.lib new file mode 100644 index 0000000..6e01b98 --- /dev/null +++ b/fm-amp-cache.lib @@ -0,0 +1,179 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# +3V3 +# +DEF +3V3 #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "+3V3" 0 140 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +ALIAS +3.3V +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +3V3 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# AP1117-15 +# +DEF AP1117-15 U 0 10 Y Y 1 F N +F0 "U" -150 125 50 H V C CNN +F1 "AP1117-15" 0 125 50 H V L CNN +F2 "TO_SOT_Packages_SMD:SOT-223-3_TabPin2" 0 200 50 H I C CNN +F3 "" 100 -250 50 H I C CNN +ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223 +$FPLIST + SOT?223*TabPin2* +$ENDFPLIST +DRAW +S -200 -200 200 75 0 1 10 f +X GND 1 0 -300 100 U 50 50 1 1 W +X VO 2 300 0 100 L 50 50 1 1 P +X VI 3 -300 0 100 R 50 50 1 1 W +ENDDRAW +ENDDEF +# +# BGA420 +# +DEF BGA420 U 0 40 Y Y 1 F N +F0 "U" 50 50 60 H V C CNN +F1 "BGA420" 450 50 60 H V C CNN +F2 "" -50 50 60 H I C CNN +F3 "" -50 50 60 H I C CNN +$FPLIST + shimatta_smd:BGA420-INF +$ENDFPLIST +DRAW +S 0 0 550 -500 0 1 0 f +X RFIN 1 -200 -250 200 R 50 50 1 1 I +X GND 2 200 -700 200 U 50 50 1 1 W +X RFOUT 3 750 -250 200 L 50 50 1 1 O +X VCC 4 200 200 200 D 50 50 1 1 W +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Conn_01x02 +# +DEF Conn_01x02 J 0 40 Y N 1 F N +F0 "J" 0 100 50 H V C CNN +F1 "Conn_01x02" 0 -200 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_??x*mm* + Connector*:*1x??x*mm* + Pin?Header?Straight?1X* + Pin?Header?Angled?1X* + Socket?Strip?Straight?1X* + Socket?Strip?Angled?1X* +$ENDFPLIST +DRAW +S -50 -95 0 -105 1 1 6 N +S -50 5 0 -5 1 1 6 N +S -50 50 50 -150 1 1 10 f +X Pin_1 1 -200 0 150 R 50 50 1 1 P +X Pin_2 2 -200 -100 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Conn_Coaxial +# +DEF Conn_Coaxial J 0 40 Y N 1 F N +F0 "J" 10 120 50 H V C CNN +F1 "Conn_Coaxial" 115 0 50 V V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + *BNC* + *SMA* + *SMB* + *SMC* + *Cinch* +$ENDFPLIST +DRAW +A -2 0 71 1636 0 0 1 10 N -70 20 70 0 +A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20 +C 0 0 20 0 1 8 N +P 2 0 1 0 -50 0 -20 0 N +P 2 0 1 0 0 -100 0 -70 N +X In 1 -150 0 100 R 50 50 1 1 P +X Ext 2 0 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# L_Small +# +DEF L_Small L 0 10 N N 1 F N +F0 "L" 30 40 50 H V L CNN +F1 "L_Small" 30 -40 50 H V L CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Choke_* + *Coil* + Inductor_* + L_* +$ENDFPLIST +DRAW +A 0 -60 20 -899 899 0 1 0 N 0 -80 0 -40 +A 0 -20 20 -899 899 0 1 0 N 0 -40 0 0 +A 0 20 20 -899 899 0 1 0 N 0 0 0 40 +A 0 60 20 -899 899 0 1 0 N 0 40 0 80 +X ~ 1 0 100 20 D 50 50 1 1 P +X ~ 2 0 -100 20 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/fm-amp.kicad_pcb b/fm-amp.kicad_pcb new file mode 100644 index 0000000..875b8ab --- /dev/null +++ b/fm-amp.kicad_pcb @@ -0,0 +1,877 @@ +(kicad_pcb (version 20170922) (host pcbnew "(2017-10-26 revision d2d123750)-master") + +(general + (thickness 1.6) + (drawings 0) + (tracks 3) + (zones 0) + (modules 18) + (nets 10) +) + +(page A4) +(layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) +) + + +(setup + (last_trace_width 0.25) + (user_trace_width 0.4) + (user_trace_width 3) + (trace_clearance 0.2) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (segment_width 0.2) + (edge_width 0.15) + (via_size 0.8) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (user_via 0.5 0.3) + (user_via 0.8 0.4) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.524 1.524) + (pad_drill 0.762) + (pad_to_mask_clearance 0.2) + (aux_axis_origin 0 0) + (visible_elements FFFFFF7F) + (pcbplotparams + (layerselection 0x010fc_ffffffff) + (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "")) +) + +(net 0 "") +(net 1 GND) +(net 2 "Net-(C3-Pad1)") +(net 3 +3V3) +(net 4 "Net-(C5-Pad1)") +(net 5 "Net-(C8-Pad1)") +(net 6 "Net-(C9-Pad1)") +(net 7 "Net-(C9-Pad2)") +(net 8 "Net-(J3-Pad1)") +(net 9 /VIN) + +(net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.8) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) +) + +(net_class POWER "" + (clearance 0.2) + (trace_width 0.4) + (via_dia 0.8) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +3V3) + (add_net /VIN) + (add_net GND) +) + +(net_class RF "" + (clearance 0.3) + (trace_width 3) + (via_dia 0.8) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net "Net-(C3-Pad1)") + (add_net "Net-(C5-Pad1)") + (add_net "Net-(C8-Pad1)") + (add_net "Net-(C9-Pad1)") + (add_net "Net-(C9-Pad2)") + (add_net "Net-(J3-Pad1)") +) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A45AB) + (at 67.475952 52.0575) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D6204) + (attr smd) + (fp_text reference C1 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 9 /VIN)) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A45BC) + (at 58.855952 52.2275) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D623C) + (attr smd) + (fp_text reference C2 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 9 /VIN)) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A45CD) + (at 73.169762 35.9575) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D7717) + (attr smd) + (fp_text reference C3 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 20p (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 2 "Net-(C3-Pad1)")) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A45DE) + (at 64.295952 47.0075) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D645A) + (attr smd) + (fp_text reference C4 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A45EF) + (at 58.379762 57.2775) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D766F) + (attr smd) + (fp_text reference C5 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 20p (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 4 "Net-(C5-Pad1)")) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A4600) + (at 68.605952 47.0075) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D65D3) + (attr smd) + (fp_text reference C6 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A4611) + (at 76.465001 35.9575) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D66E6) + (attr smd) + (fp_text reference C7 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A4622) + (at 73.645952 41.0075) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D6F0B) + (attr smd) + (fp_text reference C8 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 4 "Net-(C5-Pad1)")) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 5 "Net-(C8-Pad1)")) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 59958EE7) (tstamp 5A3A4633) + (at 63.165952 52.2275) + (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0603") + (path /5A0D6F8D) + (attr smd) + (fp_text reference C9 (at 0 -1.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.3 0.3) (thickness 0.075))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05)) + (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 6 "Net-(C9-Pad1)")) + (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask) + (net 7 "Net-(C9-Pad2)")) + (model Capacitors_SMD.3dshapes/C_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5A3A4666) + (at 34 20.5) + (descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row") + (tags "Through hole angled pin header THT 1x02 2.54mm single row") + (path /5A0D5FA5) + (fp_text reference J1 (at 4.385 -2.27) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Conn_01x02 (at 4.385 4.81) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 2.77 1.27 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 10.55 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 10.55 4.35) (end 10.55 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 4.35) (end 10.55 4.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.042929 2.92) (end 1.44 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.042929 2.16) (end 1.44 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.1 2.92) (end 4.1 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.1 2.16) (end 10.1 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 2.16) (end 10.1 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.44 1.27) (end 4.1 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 0.38) (end 1.44 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 -0.38) (end 1.44 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 0.28) (end 10.1 0.28) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 0.16) (end 10.1 0.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 0.04) (end 10.1 0.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 -0.08) (end 10.1 -0.08) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 -0.2) (end 10.1 -0.2) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 -0.32) (end 10.1 -0.32) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.1 0.38) (end 4.1 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.1 -0.38) (end 10.1 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 -0.38) (end 10.1 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 -1.33) (end 1.44 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.1 3.87) (end 4.1 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.44 3.87) (end 4.1 3.87) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.44 -1.33) (end 1.44 3.87) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.04 2.86) (end 10.04 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start 10.04 2.22) (end 10.04 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start 4.04 2.22) (end 10.04 2.22) (layer F.Fab) (width 0.1)) + (fp_line (start -0.32 2.86) (end 1.5 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start -0.32 2.22) (end -0.32 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start -0.32 2.22) (end 1.5 2.22) (layer F.Fab) (width 0.1)) + (fp_line (start 4.04 0.32) (end 10.04 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 10.04 -0.32) (end 10.04 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 4.04 -0.32) (end 10.04 -0.32) (layer F.Fab) (width 0.1)) + (fp_line (start -0.32 0.32) (end 1.5 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start -0.32 -0.32) (end -0.32 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start -0.32 -0.32) (end 1.5 -0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 1.5 -0.635) (end 2.135 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.5 3.81) (end 1.5 -0.635) (layer F.Fab) (width 0.1)) + (fp_line (start 4.04 3.81) (end 1.5 3.81) (layer F.Fab) (width 0.1)) + (fp_line (start 4.04 -1.27) (end 4.04 3.81) (layer F.Fab) (width 0.1)) + (fp_line (start 2.135 -1.27) (end 4.04 -1.27) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 9 /VIN)) + (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x02_Pitch2.54mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connectors_Molex:Molex_SMA_Jack_Edge_Mount (layer F.Cu) (tedit 587D2992) (tstamp 5A3A468B) + (at 18 43.5) + (descr "Molex SMA Jack, Edge Mount, http://www.molex.com/pdm_docs/sd/732511150_sd.pdf") + (tags "sma edge") + (path /5A0D7D41) + (attr smd) + (fp_text reference J2 (at -1.72 7.11) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Conn_Coaxial (at -1.72 -7.11) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -4.76 -0.38) (end 0.49 -0.38) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 0.38) (end 0.49 0.38) (layer F.Fab) (width 0.1)) + (fp_line (start 0.49 -0.38) (end 0.49 0.38) (layer F.Fab) (width 0.1)) + (fp_line (start 0.49 3.75) (end 0.49 4.76) (layer F.Fab) (width 0.1)) + (fp_line (start 0.49 -4.76) (end 0.49 -3.75) (layer F.Fab) (width 0.1)) + (fp_line (start -14.29 -6.09) (end -14.29 6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start -14.29 6.09) (end 2.71 6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.71 -6.09) (end 2.71 6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start -14.29 -6.09) (end 2.71 -6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start -14.29 -6.09) (end -14.29 6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start -14.29 6.09) (end 2.71 6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start 2.71 -6.09) (end 2.71 6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.71 -6.09) (end -14.29 -6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.76 -3.75) (end 0.49 -3.75) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 3.75) (end 0.49 3.75) (layer F.Fab) (width 0.1)) + (fp_line (start -13.79 -2.65) (end -5.91 -2.65) (layer F.Fab) (width 0.1)) + (fp_line (start -13.79 -2.65) (end -13.79 2.65) (layer F.Fab) (width 0.1)) + (fp_line (start -13.79 2.65) (end -5.91 2.65) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 -3.75) (end -4.76 3.75) (layer F.Fab) (width 0.1)) + (fp_line (start 0.49 -4.76) (end -5.91 -4.76) (layer F.Fab) (width 0.1)) + (fp_line (start -5.91 -4.76) (end -5.91 4.76) (layer F.Fab) (width 0.1)) + (fp_line (start -5.91 4.76) (end 0.49 4.76) (layer F.Fab) (width 0.1)) + (pad 1 smd rect (at -1.72 0) (size 5.08 2.29) (layers F.Cu F.Paste F.Mask) + (net 2 "Net-(C3-Pad1)")) + (pad 2 smd rect (at -1.72 -4.38) (size 5.08 2.42) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at -1.72 4.38) (size 5.08 2.42) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at -1.72 -4.38) (size 5.08 2.42) (layers B.Cu B.Paste B.Mask) + (net 1 GND)) + (pad 2 smd rect (at -1.72 4.38) (size 5.08 2.42) (layers B.Cu B.Paste B.Mask) + (net 1 GND)) + (pad 2 thru_hole circle (at 1.72 -4.38) (size 0.97 0.97) (drill 0.46) (layers *.Cu) + (net 1 GND)) + (pad 2 thru_hole circle (at 1.72 4.38) (size 0.97 0.97) (drill 0.46) (layers *.Cu) + (net 1 GND)) + (pad 2 smd rect (at 1.27 -4.38) (size 0.89 0.46) (layers F.Cu) + (net 1 GND)) + (pad 2 smd rect (at 1.27 4.38) (size 0.89 0.46) (layers F.Cu) + (net 1 GND)) + (pad 2 smd rect (at 1.27 -4.38) (size 0.89 0.46) (layers B.Cu) + (net 1 GND)) + (pad 2 smd rect (at 1.27 4.38) (size 0.89 0.46) (layers B.Cu) + (net 1 GND)) + (model ${KISYS3DMOD}/Connectors_Molex.3dshapes/Molex_SMA_Jack_Edge_Mount.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connectors_Molex:Molex_SMA_Jack_Edge_Mount (layer F.Cu) (tedit 587D2992) (tstamp 5A3A46B0) + (at 103.5 43.5 180) + (descr "Molex SMA Jack, Edge Mount, http://www.molex.com/pdm_docs/sd/732511150_sd.pdf") + (tags "sma edge") + (path /5A0D8EED) + (attr smd) + (fp_text reference J3 (at -1.72 7.11 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Conn_Coaxial (at -1.72 -7.11 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -5.91 4.76) (end 0.49 4.76) (layer F.Fab) (width 0.1)) + (fp_line (start -5.91 -4.76) (end -5.91 4.76) (layer F.Fab) (width 0.1)) + (fp_line (start 0.49 -4.76) (end -5.91 -4.76) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 -3.75) (end -4.76 3.75) (layer F.Fab) (width 0.1)) + (fp_line (start -13.79 2.65) (end -5.91 2.65) (layer F.Fab) (width 0.1)) + (fp_line (start -13.79 -2.65) (end -13.79 2.65) (layer F.Fab) (width 0.1)) + (fp_line (start -13.79 -2.65) (end -5.91 -2.65) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 3.75) (end 0.49 3.75) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 -3.75) (end 0.49 -3.75) (layer F.Fab) (width 0.1)) + (fp_line (start 2.71 -6.09) (end -14.29 -6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.71 -6.09) (end 2.71 6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start -14.29 6.09) (end 2.71 6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start -14.29 -6.09) (end -14.29 6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start -14.29 -6.09) (end 2.71 -6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start 2.71 -6.09) (end 2.71 6.09) (layer B.CrtYd) (width 0.05)) + (fp_line (start -14.29 6.09) (end 2.71 6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start -14.29 -6.09) (end -14.29 6.09) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.49 -4.76) (end 0.49 -3.75) (layer F.Fab) (width 0.1)) + (fp_line (start 0.49 3.75) (end 0.49 4.76) (layer F.Fab) (width 0.1)) + (fp_line (start 0.49 -0.38) (end 0.49 0.38) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 0.38) (end 0.49 0.38) (layer F.Fab) (width 0.1)) + (fp_line (start -4.76 -0.38) (end 0.49 -0.38) (layer F.Fab) (width 0.1)) + (pad 2 smd rect (at 1.27 4.38 180) (size 0.89 0.46) (layers B.Cu) + (net 1 GND)) + (pad 2 smd rect (at 1.27 -4.38 180) (size 0.89 0.46) (layers B.Cu) + (net 1 GND)) + (pad 2 smd rect (at 1.27 4.38 180) (size 0.89 0.46) (layers F.Cu) + (net 1 GND)) + (pad 2 smd rect (at 1.27 -4.38 180) (size 0.89 0.46) (layers F.Cu) + (net 1 GND)) + (pad 2 thru_hole circle (at 1.72 4.38 180) (size 0.97 0.97) (drill 0.46) (layers *.Cu) + (net 1 GND)) + (pad 2 thru_hole circle (at 1.72 -4.38 180) (size 0.97 0.97) (drill 0.46) (layers *.Cu) + (net 1 GND)) + (pad 2 smd rect (at -1.72 4.38 180) (size 5.08 2.42) (layers B.Cu B.Paste B.Mask) + (net 1 GND)) + (pad 2 smd rect (at -1.72 -4.38 180) (size 5.08 2.42) (layers B.Cu B.Paste B.Mask) + (net 1 GND)) + (pad 2 smd rect (at -1.72 4.38 180) (size 5.08 2.42) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at -1.72 -4.38 180) (size 5.08 2.42) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -1.72 0 180) (size 5.08 2.29) (layers F.Cu F.Paste F.Mask) + (net 8 "Net-(J3-Pad1)")) + (model ${KISYS3DMOD}/Connectors_Molex.3dshapes/Molex_SMA_Jack_Edge_Mount.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5A3A46C1) + (at 62.235001 57.2275) + (descr "Resistor SMD 0603, hand soldering") + (tags "resistor 0603") + (path /5A0D74E3) + (attr smd) + (fp_text reference L1 (at 0 -1.45) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.96 -0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.96 -0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.075))) + ) + (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 4 "Net-(C5-Pad1)")) + (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 2 "Net-(C3-Pad1)")) + (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603 (layer F.Cu) (tedit 58E0A804) (tstamp 5A3A46D2) + (at 77.503571 40.9575) + (descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)") + (tags "resistor 0603") + (path /5A0D862B) + (attr smd) + (fp_text reference R1 (at 0 -1.45) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 130 (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.075))) + ) + (pad 2 smd rect (at 0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) + (net 6 "Net-(C9-Pad1)")) + (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603 (layer F.Cu) (tedit 58E0A804) (tstamp 5A3A46E3) + (at 72.965001 46.0075) + (descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)") + (tags "resistor 0603") + (path /5A0D86CF) + (attr smd) + (fp_text reference R2 (at 0 -1.45) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 45 (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.075))) + ) + (pad 2 smd rect (at 0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) + (net 6 "Net-(C9-Pad1)")) + (pad 1 smd rect (at -0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) + (net 8 "Net-(J3-Pad1)")) + (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603 (layer F.Cu) (tedit 58E0A804) (tstamp 5A3A46F4) + (at 67.023571 57.0575) + (descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)") + (tags "resistor 0603") + (path /5A0D8669) + (attr smd) + (fp_text reference R3 (at 0 -1.45) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 130 (at 0 1.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.075))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05)) + (pad 1 smd rect (at -0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) + (net 8 "Net-(J3-Pad1)")) + (pad 2 smd rect (at 0.75 0) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module TO_SOT_Packages_SMD:SOT-223-3_TabPin2 (layer F.Cu) (tedit 58CE4E7E) (tstamp 5A3A470A) + (at 43 33.5 90) + (descr "module CMS SOT223 4 pins") + (tags "CMS SOT") + (path /5A0D5D37) + (attr smd) + (fp_text reference U1 (at 0 -4.5 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value AP1117-33 (at 0 4.5 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.85 -3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1)) + (fp_line (start -4.1 -3.41) (end 1.91 -3.41) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.85 -3.35) (end 1.85 -3.35) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 3.41) (end 1.91 3.41) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 -2.35) (end -1.85 3.35) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -2.35) (end -0.85 -3.35) (layer F.Fab) (width 0.1)) + (fp_line (start -4.4 -3.6) (end -4.4 3.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.4 3.6) (end 4.4 3.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.4 3.6) (end 4.4 -3.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.4 -3.6) (end -4.4 -3.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.91 3.41) (end 1.91 2.15) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0 180) (layer F.Fab) + (effects (font (size 0.8 0.8) (thickness 0.12))) + ) + (pad 1 smd rect (at -3.15 -2.3 90) (size 2 1.5) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 3 smd rect (at -3.15 2.3 90) (size 2 1.5) (layers F.Cu F.Paste F.Mask) + (net 9 /VIN)) + (pad 2 smd rect (at -3.15 0 90) (size 2 1.5) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 2 smd rect (at 3.15 0 90) (size 2 3.8) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module shimatta_smd:BGA420-INF (layer F.Cu) (tedit 5A0A04B8) (tstamp 5A3A4716) + (at 42.5 44.5) + (path /5A0D5B0F) + (fp_text reference U2 (at 0.25 -2.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value BGA420 (at -13 -8) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.5 -1.75) (end -1.5 1.75) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5 1.75) (end 1.5 1.75) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.5 1.75) (end 1.5 -1.75) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.5 -1.75) (end -1.5 -1.75) (layer F.SilkS) (width 0.15)) + (pad 4 smd rect (at -0.65 -0.8) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 3 smd rect (at 0.65 -0.8) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask) + (net 7 "Net-(C9-Pad2)")) + (pad 1 smd rect (at -0.65 0.8) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask) + (net 5 "Net-(C8-Pad1)")) + (pad 2 smd rect (at 0.5 0.8) (size 1 0.9) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + ) + + (segment (start 16.28 43.5) (end 38.5 43.5) (width 3) (layer F.Cu) (net 2)) + (segment (start 60.985001 57.2275) (end 61.135001 57.2275) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 16.28 43.5) (end 17.675 43.5) (width 0.4) (layer F.Cu) (net 2)) + +) diff --git a/fm-amp.pro b/fm-amp.pro new file mode 100644 index 0000000..413bc26 --- /dev/null +++ b/fm-amp.pro @@ -0,0 +1,134 @@ +update=Thu 16 Nov 2017 10:31:32 AM CET +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir=../shimattapcblibs/schematics +[eeschema/libraries] +LibName1=shimatta_rf +LibName2=ac-dc +LibName3=adc-dac +LibName4=Altera +LibName5=analog_devices +LibName6=analog_switches +LibName7=atmel +LibName8=audio +LibName9=Battery_Management +LibName10=bbd +LibName11=Bosch +LibName12=brooktre +LibName13=Connector +LibName14=contrib +LibName15=cypress +LibName16=dc-dc +LibName17=device +LibName18=digital-audio +LibName19=Diode +LibName20=Display +LibName21=driver_gate +LibName22=dsp +LibName23=DSP_Microchip_DSPIC33 +LibName24=elec-unifil +LibName25=ESD_Protection +LibName26=Espressif +LibName27=FPGA_Actel +LibName28=ftdi +LibName29=gennum +LibName30=Graphic +LibName31=hc11 +LibName32=infineon +LibName33=intel +LibName34=interface +LibName35=intersil +LibName36=ir +LibName37=Lattice +LibName38=LED +LibName39=LEM +LibName40=linear +LibName41=Logic_74xgxx +LibName42=Logic_74xx +LibName43=Logic_CMOS_4000 +LibName44=Logic_CMOS_IEEE +LibName45=logic_programmable +LibName46=Logic_TTL_IEEE +LibName47=maxim +LibName48=MCU_Microchip_PIC10 +LibName49=MCU_Microchip_PIC12 +LibName50=MCU_Microchip_PIC16 +LibName51=MCU_Microchip_PIC18 +LibName52=MCU_Microchip_PIC24 +LibName53=MCU_Microchip_PIC32 +LibName54=MCU_NXP_Kinetis +LibName55=MCU_NXP_LPC +LibName56=MCU_NXP_S08 +LibName57=MCU_Parallax +LibName58=MCU_ST_STM8 +LibName59=MCU_ST_STM32 +LibName60=MCU_Texas_MSP430 +LibName61=Mechanical +LibName62=memory +LibName63=microchip +LibName64=microcontrollers +LibName65=modules +LibName66=Motor +LibName67=motor_drivers +LibName68=motorola +LibName69=nordicsemi +LibName70=nxp +LibName71=onsemi +LibName72=opto +LibName73=Oscillators +LibName74=philips +LibName75=power +LibName76=powerint +LibName77=Power_Management +LibName78=pspice +LibName79=references +LibName80=regul +LibName81=Relay +LibName82=rfcom +LibName83=RFSolutions +LibName84=Sensor_Current +LibName85=sensors +LibName86=silabs +LibName87=siliconi +LibName88=supertex +LibName89=Switch +LibName90=texas +LibName91=Transformer +LibName92=Transistor +LibName93=triac_thyristor +LibName94=Valve +LibName95=video +LibName96=wiznet +LibName97=Worldsemi +LibName98=Xicor +LibName99=xilinx +LibName100=zetex +LibName101=Zilog diff --git a/fm-amp.sch b/fm-amp.sch new file mode 100644 index 0000000..7f7f205 --- /dev/null +++ b/fm-amp.sch @@ -0,0 +1,591 @@ +EESchema Schematic File Version 3 +LIBS:shimatta_rf +LIBS:ac-dc +LIBS:adc-dac +LIBS:Altera +LIBS:analog_devices +LIBS:analog_switches +LIBS:atmel +LIBS:audio +LIBS:Battery_Management +LIBS:bbd +LIBS:Bosch +LIBS:brooktre +LIBS:Connector +LIBS:contrib +LIBS:cypress +LIBS:dc-dc +LIBS:device +LIBS:digital-audio +LIBS:Diode +LIBS:Display +LIBS:driver_gate +LIBS:dsp +LIBS:DSP_Microchip_DSPIC33 +LIBS:elec-unifil +LIBS:ESD_Protection +LIBS:Espressif +LIBS:FPGA_Actel +LIBS:ftdi +LIBS:gennum +LIBS:Graphic +LIBS:hc11 +LIBS:infineon +LIBS:intel +LIBS:interface +LIBS:intersil +LIBS:ir +LIBS:Lattice +LIBS:LED +LIBS:LEM +LIBS:linear +LIBS:Logic_74xgxx +LIBS:Logic_74xx +LIBS:Logic_CMOS_4000 +LIBS:Logic_CMOS_IEEE +LIBS:logic_programmable +LIBS:Logic_TTL_IEEE +LIBS:maxim +LIBS:MCU_Microchip_PIC10 +LIBS:MCU_Microchip_PIC12 +LIBS:MCU_Microchip_PIC16 +LIBS:MCU_Microchip_PIC18 +LIBS:MCU_Microchip_PIC24 +LIBS:MCU_Microchip_PIC32 +LIBS:MCU_NXP_Kinetis +LIBS:MCU_NXP_LPC +LIBS:MCU_NXP_S08 +LIBS:MCU_Parallax +LIBS:MCU_ST_STM8 +LIBS:MCU_ST_STM32 +LIBS:MCU_Texas_MSP430 +LIBS:Mechanical +LIBS:memory +LIBS:microchip +LIBS:microcontrollers +LIBS:modules +LIBS:Motor +LIBS:motor_drivers +LIBS:motorola +LIBS:nordicsemi +LIBS:nxp +LIBS:onsemi +LIBS:opto +LIBS:Oscillators +LIBS:philips +LIBS:power +LIBS:powerint +LIBS:Power_Management +LIBS:pspice +LIBS:references +LIBS:regul +LIBS:Relay +LIBS:rfcom +LIBS:RFSolutions +LIBS:Sensor_Current +LIBS:sensors +LIBS:silabs +LIBS:siliconi +LIBS:supertex +LIBS:Switch +LIBS:texas +LIBS:Transformer +LIBS:Transistor +LIBS:triac_thyristor +LIBS:Valve +LIBS:video +LIBS:wiznet +LIBS:Worldsemi +LIBS:Xicor +LIBS:xilinx +LIBS:zetex +LIBS:Zilog +LIBS:fm-amp-cache +EELAYER 26 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "FM Amplifier" +Date "2017-11-16" +Rev "0.1" +Comp "Shimatta" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L BGA420 U2 +U 1 1 5A0D5B0F +P 3850 2150 +F 0 "U2" H 4300 2350 60 0000 L CNN +F 1 "BGA420" H 4300 2250 60 0000 L CNN +F 2 "shimatta_smd:BGA420-INF" H 3800 2200 60 0001 C CNN +F 3 "" H 3800 2200 60 0001 C CNN + 1 3850 2150 + 1 0 0 -1 +$EndComp +$Comp +L AP1117-33 U1 +U 1 1 5A0D5D37 +P 2050 750 +F 0 "U1" H 2050 992 50 0000 C CNN +F 1 "AP1117-33" H 2050 901 50 0000 C CNN +F 2 "TO_SOT_Packages_SMD:SOT-223-3_TabPin2" H 2050 950 50 0001 C CNN +F 3 "http://www.diodes.com/datasheets/AP1117.pdf" H 2150 500 50 0001 C CNN + 1 2050 750 + 1 0 0 -1 +$EndComp +$Comp +L Conn_01x02 J1 +U 1 1 5A0D5FA5 +P 750 850 +F 0 "J1" H 670 525 50 0000 C CNN +F 1 "Conn_01x02" H 670 616 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 750 850 50 0001 C CNN +F 3 "~" H 750 850 50 0001 C CNN + 1 750 850 + -1 0 0 1 +$EndComp +Wire Wire Line + 950 750 1750 750 +Wire Wire Line + 950 850 1000 850 +Wire Wire Line + 1000 850 1000 1200 +$Comp +L GND #PWR01 +U 1 1 5A0D618F +P 1000 1200 +F 0 "#PWR01" H 1000 950 50 0001 C CNN +F 1 "GND" H 1005 1027 50 0000 C CNN +F 2 "" H 1000 1200 50 0001 C CNN +F 3 "" H 1000 1200 50 0001 C CNN + 1 1000 1200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR05 +U 1 1 5A0D61A7 +P 2050 1200 +F 0 "#PWR05" H 2050 950 50 0001 C CNN +F 1 "GND" H 2055 1027 50 0000 C CNN +F 2 "" H 2050 1200 50 0001 C CNN +F 3 "" H 2050 1200 50 0001 C CNN + 1 2050 1200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2050 1200 2050 1050 +$Comp +L C C1 +U 1 1 5A0D6204 +P 1200 1000 +F 0 "C1" H 1315 1046 50 0000 L CNN +F 1 "100n" H 1315 955 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603" H 1238 850 50 0001 C CNN +F 3 "" H 1200 1000 50 0001 C CNN + 1 1200 1000 + 1 0 0 -1 +$EndComp +$Comp +L C C2 +U 1 1 5A0D623C +P 1600 1000 +F 0 "C2" H 1715 1046 50 0000 L CNN +F 1 "100n" H 1715 955 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603" H 1638 850 50 0001 C CNN +F 3 "" H 1600 1000 50 0001 C CNN + 1 1600 1000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1600 850 1600 750 +Connection ~ 1600 750 +Wire Wire Line + 1200 850 1200 750 +Connection ~ 1200 750 +$Comp +L GND #PWR03 +U 1 1 5A0D63BD +P 1200 1200 +F 0 "#PWR03" H 1200 950 50 0001 C CNN +F 1 "GND" H 1205 1027 50 0000 C CNN +F 2 "" H 1200 1200 50 0001 C CNN +F 3 "" H 1200 1200 50 0001 C CNN + 1 1200 1200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 5A0D63D2 +P 1600 1200 +F 0 "#PWR04" H 1600 950 50 0001 C CNN +F 1 "GND" H 1605 1027 50 0000 C CNN +F 2 "" H 1600 1200 50 0001 C CNN +F 3 "" H 1600 1200 50 0001 C CNN + 1 1600 1200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1600 1200 1600 1150 +Wire Wire Line + 1200 1200 1200 1150 +$Comp +L C C4 +U 1 1 5A0D645A +P 2450 1000 +F 0 "C4" H 2565 1046 50 0000 L CNN +F 1 "100n" H 2565 955 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603" H 2488 850 50 0001 C CNN +F 3 "" H 2450 1000 50 0001 C CNN + 1 2450 1000 + 1 0 0 -1 +$EndComp +$Comp +L C C6 +U 1 1 5A0D65D3 +P 2850 1000 +F 0 "C6" H 2965 1046 50 0000 L CNN +F 1 "100n" H 2965 955 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603" H 2888 850 50 0001 C CNN +F 3 "" H 2850 1000 50 0001 C CNN + 1 2850 1000 + 1 0 0 -1 +$EndComp +$Comp +L C C7 +U 1 1 5A0D66E6 +P 3300 1000 +F 0 "C7" H 3415 1046 50 0000 L CNN +F 1 "1u" H 3415 955 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603" H 3338 850 50 0001 C CNN +F 3 "" H 3300 1000 50 0001 C CNN + 1 3300 1000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2350 750 3300 750 +Wire Wire Line + 3300 700 3300 850 +$Comp +L GND #PWR011 +U 1 1 5A0D6786 +P 3300 1200 +F 0 "#PWR011" H 3300 950 50 0001 C CNN +F 1 "GND" H 3305 1027 50 0000 C CNN +F 2 "" H 3300 1200 50 0001 C CNN +F 3 "" H 3300 1200 50 0001 C CNN + 1 3300 1200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3300 1200 3300 1150 +$Comp +L GND #PWR09 +U 1 1 5A0D6807 +P 2850 1200 +F 0 "#PWR09" H 2850 950 50 0001 C CNN +F 1 "GND" H 2855 1027 50 0000 C CNN +F 2 "" H 2850 1200 50 0001 C CNN +F 3 "" H 2850 1200 50 0001 C CNN + 1 2850 1200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2850 1200 2850 1150 +$Comp +L GND #PWR07 +U 1 1 5A0D681E +P 2450 1200 +F 0 "#PWR07" H 2450 950 50 0001 C CNN +F 1 "GND" H 2455 1027 50 0000 C CNN +F 2 "" H 2450 1200 50 0001 C CNN +F 3 "" H 2450 1200 50 0001 C CNN + 1 2450 1200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2450 1200 2450 1150 +Wire Wire Line + 2450 850 2450 750 +Connection ~ 2450 750 +Wire Wire Line + 2850 850 2850 750 +Connection ~ 2850 750 +$Comp +L +3V3 #PWR010 +U 1 1 5A0D6C4F +P 3300 700 +F 0 "#PWR010" H 3300 550 50 0001 C CNN +F 1 "+3V3" H 3315 873 50 0000 C CNN +F 2 "" H 3300 700 50 0001 C CNN +F 3 "" H 3300 700 50 0001 C CNN + 1 3300 700 + 1 0 0 -1 +$EndComp +Connection ~ 3300 750 +$Comp +L +3V3 #PWR012 +U 1 1 5A0D6E40 +P 4050 1850 +F 0 "#PWR012" H 4050 1700 50 0001 C CNN +F 1 "+3V3" H 4065 2023 50 0000 C CNN +F 2 "" H 4050 1850 50 0001 C CNN +F 3 "" H 4050 1850 50 0001 C CNN + 1 4050 1850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4050 1950 4050 1850 +Wire Wire Line + 3650 2400 3550 2400 +$Comp +L C C8 +U 1 1 5A0D6F0B +P 3400 2400 +F 0 "C8" V 3148 2400 50 0000 C CNN +F 1 "100n" V 3239 2400 50 0000 C CNN +F 2 "Capacitors_SMD:C_0603" H 3438 2250 50 0001 C CNN +F 3 "" H 3400 2400 50 0001 C CNN + 1 3400 2400 + 0 1 1 0 +$EndComp +$Comp +L C C9 +U 1 1 5A0D6F8D +P 4850 2400 +F 0 "C9" V 4598 2400 50 0000 C CNN +F 1 "100n" V 4689 2400 50 0000 C CNN +F 2 "Capacitors_SMD:C_0603" H 4888 2250 50 0001 C CNN +F 3 "" H 4850 2400 50 0001 C CNN + 1 4850 2400 + 0 1 1 0 +$EndComp +Wire Wire Line + 4600 2400 4700 2400 +$Comp +L L_Small L1 +U 1 1 5A0D74E3 +P 2300 2400 +F 0 "L1" V 2485 2400 50 0000 C CNN +F 1 "100n" V 2394 2400 50 0000 C CNN +F 2 "Resistors_SMD:R_0603_HandSoldering" H 2300 2400 50 0001 C CNN +F 3 "" H 2300 2400 50 0001 C CNN + 1 2300 2400 + 0 -1 -1 0 +$EndComp +$Comp +L C C5 +U 1 1 5A0D766F +P 2500 2600 +F 0 "C5" H 2615 2646 50 0000 L CNN +F 1 "20p" H 2615 2555 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603" H 2538 2450 50 0001 C CNN +F 3 "" H 2500 2600 50 0001 C CNN + 1 2500 2600 + 1 0 0 -1 +$EndComp +$Comp +L C C3 +U 1 1 5A0D7717 +P 2100 2600 +F 0 "C3" H 2215 2646 50 0000 L CNN +F 1 "20p" H 2215 2555 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603" H 2138 2450 50 0001 C CNN +F 3 "" H 2100 2600 50 0001 C CNN + 1 2100 2600 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1300 2400 2200 2400 +Wire Wire Line + 2100 2450 2100 2400 +Connection ~ 2100 2400 +Wire Wire Line + 2400 2400 3250 2400 +Wire Wire Line + 2500 2450 2500 2400 +Connection ~ 2500 2400 +$Comp +L GND #PWR06 +U 1 1 5A0D78BD +P 2100 2900 +F 0 "#PWR06" H 2100 2650 50 0001 C CNN +F 1 "GND" H 2105 2727 50 0000 C CNN +F 2 "" H 2100 2900 50 0001 C CNN +F 3 "" H 2100 2900 50 0001 C CNN + 1 2100 2900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR08 +U 1 1 5A0D794A +P 2500 2900 +F 0 "#PWR08" H 2500 2650 50 0001 C CNN +F 1 "GND" H 2505 2727 50 0000 C CNN +F 2 "" H 2500 2900 50 0001 C CNN +F 3 "" H 2500 2900 50 0001 C CNN + 1 2500 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2500 2900 2500 2750 +Wire Wire Line + 2100 2750 2100 2900 +$Comp +L GND #PWR013 +U 1 1 5A0D7B62 +P 4050 2900 +F 0 "#PWR013" H 4050 2650 50 0001 C CNN +F 1 "GND" H 4055 2727 50 0000 C CNN +F 2 "" H 4050 2900 50 0001 C CNN +F 3 "" H 4050 2900 50 0001 C CNN + 1 4050 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4050 2900 4050 2850 +$Comp +L Conn_Coaxial J2 +U 1 1 5A0D7D41 +P 1150 2400 +F 0 "J2" H 1250 2376 50 0000 L CNN +F 1 "Conn_Coaxial" H 1250 2285 50 0000 L CNN +F 2 "Connectors_Molex:Molex_SMA_Jack_Edge_Mount" H 1150 2400 50 0001 C CNN +F 3 "" H 1150 2400 50 0001 C CNN + 1 1150 2400 + -1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 5A0D7EEA +P 1150 2900 +F 0 "#PWR02" H 1150 2650 50 0001 C CNN +F 1 "GND" H 1155 2727 50 0000 C CNN +F 2 "" H 1150 2900 50 0001 C CNN +F 3 "" H 1150 2900 50 0001 C CNN + 1 1150 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1150 2900 1150 2600 +Wire Notes Line + 5300 2050 6400 2050 +Wire Notes Line + 5300 2050 5300 3300 +Wire Notes Line + 5300 3300 6400 3300 +Wire Notes Line + 6400 3300 6400 2050 +Text Notes 5350 2150 0 60 ~ 0 +Attenuation 7dB\n +Wire Notes Line + 1950 2050 1950 3200 +Wire Notes Line + 1950 3200 2800 3200 +Wire Notes Line + 2800 3200 2800 2050 +Wire Notes Line + 2800 2050 1950 2050 +Text Notes 1950 2150 0 60 ~ 0 +Low Pass 150MHz\n +Wire Wire Line + 5000 2400 5750 2400 +$Comp +L R R1 +U 1 1 5A0D862B +P 5650 2600 +F 0 "R1" H 5720 2646 50 0000 L CNN +F 1 "130" H 5720 2555 50 0000 L CNN +F 2 "Resistors_SMD:R_0603" V 5580 2600 50 0001 C CNN +F 3 "" H 5650 2600 50 0001 C CNN + 1 5650 2600 + 1 0 0 -1 +$EndComp +$Comp +L R R3 +U 1 1 5A0D8669 +P 6150 2600 +F 0 "R3" H 6220 2646 50 0000 L CNN +F 1 "130" H 6220 2555 50 0000 L CNN +F 2 "Resistors_SMD:R_0603" V 6080 2600 50 0001 C CNN +F 3 "" H 6150 2600 50 0001 C CNN + 1 6150 2600 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 5A0D86CF +P 5900 2400 +F 0 "R2" V 5693 2400 50 0000 C CNN +F 1 "45" V 5784 2400 50 0000 C CNN +F 2 "Resistors_SMD:R_0603" V 5830 2400 50 0001 C CNN +F 3 "" H 5900 2400 50 0001 C CNN + 1 5900 2400 + 0 1 1 0 +$EndComp +Wire Wire Line + 6050 2400 6650 2400 +Wire Wire Line + 6150 2750 6150 2900 +$Comp +L GND #PWR015 +U 1 1 5A0D87E3 +P 6150 2900 +F 0 "#PWR015" H 6150 2650 50 0001 C CNN +F 1 "GND" H 6155 2727 50 0000 C CNN +F 2 "" H 6150 2900 50 0001 C CNN +F 3 "" H 6150 2900 50 0001 C CNN + 1 6150 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5650 2750 5650 2900 +$Comp +L GND #PWR014 +U 1 1 5A0D88C5 +P 5650 2900 +F 0 "#PWR014" H 5650 2650 50 0001 C CNN +F 1 "GND" H 5655 2727 50 0000 C CNN +F 2 "" H 5650 2900 50 0001 C CNN +F 3 "" H 5650 2900 50 0001 C CNN + 1 5650 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6150 2450 6150 2400 +Connection ~ 6150 2400 +Wire Wire Line + 5650 2450 5650 2400 +Connection ~ 5650 2400 +Text Notes 1950 1700 0 60 ~ 0 +Microstrip: 3mm\n +$Comp +L Conn_Coaxial J3 +U 1 1 5A0D8EED +P 6800 2400 +F 0 "J3" H 6899 2376 50 0000 L CNN +F 1 "Conn_Coaxial" H 6899 2285 50 0000 L CNN +F 2 "Connectors_Molex:Molex_SMA_Jack_Edge_Mount" H 6800 2400 50 0001 C CNN +F 3 "" H 6800 2400 50 0001 C CNN + 1 6800 2400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6800 2600 6800 2900 +$Comp +L GND #PWR016 +U 1 1 5A0D8FE2 +P 6800 2900 +F 0 "#PWR016" H 6800 2650 50 0001 C CNN +F 1 "GND" H 6805 2727 50 0000 C CNN +F 2 "" H 6800 2900 50 0001 C CNN +F 3 "" H 6800 2900 50 0001 C CNN + 1 6800 2900 + 1 0 0 -1 +$EndComp +Text Label 1250 750 0 60 ~ 0 +VIN +$EndSCHEMATC diff --git a/fp-lib-table b/fp-lib-table new file mode 100644 index 0000000..3ce4a49 --- /dev/null +++ b/fp-lib-table @@ -0,0 +1,3 @@ +(fp_lib_table + (lib (name shimatta_smd)(type KiCad)(uri ${KIPRJMOD}/../shimattapcblibs/footprints/pretty/shimatta_smd.pretty)(options "")(descr "")) +)