diff --git a/reflow-oven-control-pcb.kicad_pcb b/reflow-oven-control-pcb.kicad_pcb index b556550..da63286 100644 --- a/reflow-oven-control-pcb.kicad_pcb +++ b/reflow-oven-control-pcb.kicad_pcb @@ -3,7 +3,7 @@ (general (thickness 1.6) (drawings 54) - (tracks 1101) + (tracks 1099) (zones 0) (modules 116) (nets 133) @@ -387,7 +387,7 @@ (module proz_unknown:1271.1001 (layer F.Cu) (tedit 5C192637) (tstamp 5E036FB5) (at 16 52 180) - (fp_text reference REF** (at 2.3 2.5) (layer F.SilkS) + (fp_text reference REF** (at 2.3 2.5) (layer F.SilkS) hide (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1271.1001 (at 4.1 -2.5) (layer F.Fab) @@ -883,7 +883,7 @@ (tags capacitor) (path /5D71F258) (attr smd) - (fp_text reference C105 (at 0 -1.65 90) (layer F.SilkS) + (fp_text reference C105 (at -1.59 1.71 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 100n (at 0 1.65 90) (layer F.Fab) @@ -955,7 +955,7 @@ (tags capacitor) (path /5D722F9B) (attr smd) - (fp_text reference C107 (at 0 -1.43 90) (layer F.SilkS) + (fp_text reference C107 (at 0.22 1.81 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 100n (at 0 1.43 90) (layer F.Fab) @@ -1046,7 +1046,7 @@ (tags "capacitor electrolyic nonpolar") (path /5D7289BD) (attr smd) - (fp_text reference C109 (at 0 -3.7) (layer F.SilkS) + (fp_text reference C109 (at 1.54 -3.71) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 10u (at 0 3.7) (layer F.Fab) @@ -2279,7 +2279,7 @@ (tags diode) (path /5D8E4FA2) (attr smd) - (fp_text reference D101 (at 4 1) (layer F.SilkS) + (fp_text reference D101 (at 1.65 1.66) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value LED (at 0 1.43) (layer F.Fab) @@ -2317,7 +2317,7 @@ (tags diode) (path /5D8E4A3B) (attr smd) - (fp_text reference D102 (at -1.5 -4) (layer F.SilkS) + (fp_text reference D102 (at 4.55 -0.91) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value LED (at 0 1.43) (layer F.Fab) @@ -3353,7 +3353,7 @@ (tags resistor) (path /5D8F3F07) (attr smd) - (fp_text reference R104 (at -1.5 -3.5) (layer F.SilkS) + (fp_text reference R104 (at 0.07 -1.5) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 1k5 (at 0 1.43) (layer F.Fab) @@ -4477,7 +4477,7 @@ (tags "DPAK TO-252 DPAK-3 TO-252-3 SOT-428") (path /5D71A1E5) (attr smd) - (fp_text reference U101 (at 0 -4.5 90) (layer F.SilkS) + (fp_text reference U101 (at -3.85 -4.2 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value AZ1117-3.3 (at 0 4.5 90) (layer F.Fab) @@ -5770,10 +5770,8 @@ (segment (start 70.92 69.9) (end 71.22 70.2) (width 1) (layer F.Cu) (net 2) (status 30)) (segment (start 68 69.9) (end 70.92 69.9) (width 1) (layer F.Cu) (net 2) (status 30)) (segment (start 73.3335 78.5) (end 73.3335 76.8335) (width 0.4) (layer F.Cu) (net 2) (status 10)) - (via (at 73 76.5) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 2)) (segment (start 73.3335 76.8335) (end 73 76.5) (width 0.4) (layer F.Cu) (net 2)) (via (at 76 78.5) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 2)) - (via (at 75 76.5) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 2)) (segment (start 73.3335 78.5) (end 73.3335 78.1665) (width 0.4) (layer F.Cu) (net 2) (status 30)) (segment (start 73.3335 78.1665) (end 75 76.5) (width 0.4) (layer F.Cu) (net 2) (status 10)) (via (at 76 77.5) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 2)) diff --git a/reflow-oven-control-pcb.sch b/reflow-oven-control-pcb.sch index 124f590..c181097 100644 --- a/reflow-oven-control-pcb.sch +++ b/reflow-oven-control-pcb.sch @@ -406,23 +406,6 @@ Wire Wire Line Wire Wire Line 5550 950 5800 950 $Sheet -S 5450 2900 1050 2550 -U 5D77EC9D -F0 "Controller" 50 -F1 "stm.sch" 50 -F2 "VREF" I R 6500 3100 50 -F3 "TEMP_IN" I R 6500 3200 50 -F4 "OUT1" O L 5450 3100 50 -F5 "OUT2" O L 5450 3200 50 -F6 "OUT3" O L 5450 3300 50 -F7 "OUT4" O L 5450 3400 50 -F8 "OUT5" O L 5450 3500 50 -F9 "OUT6" O L 5450 3600 50 -F10 "OUT7" O L 5450 3700 50 -F11 "OUT0" O L 5450 3000 50 -F12 "FRONTEND_TEMP" B R 6500 3650 50 -$EndSheet -$Sheet S 7500 2900 800 2550 U 5D8C5188 F0 "Frontend" 50 @@ -1053,4 +1036,21 @@ Text Label 4750 4250 2 50 ~ 0 DIGIO3 Wire Wire Line 6500 3650 7500 3650 +$Sheet +S 5450 2900 1050 2550 +U 5D77EC9D +F0 "Controller" 50 +F1 "stm.sch" 50 +F2 "VREF" I R 6500 3100 50 +F3 "TEMP_IN" I R 6500 3200 50 +F4 "OUT1" O L 5450 3100 50 +F5 "OUT2" O L 5450 3200 50 +F6 "OUT3" O L 5450 3300 50 +F7 "OUT4" O L 5450 3400 50 +F8 "OUT5" O L 5450 3500 50 +F9 "OUT6" O L 5450 3600 50 +F10 "OUT7" O L 5450 3700 50 +F11 "OUT0" O L 5450 3000 50 +F12 "FRONTEND_TEMP" B R 6500 3650 50 +$EndSheet $EndSCHEMATC diff --git a/stm.sch b/stm.sch index b7fa2c8..9a62982 100644 --- a/stm.sch +++ b/stm.sch @@ -3,7 +3,7 @@ EELAYER 30 0 EELAYER END $Descr A4 11693 8268 encoding utf-8 -Sheet 2 3 +Sheet 3 3 Title "Reflow Oven Controller" Date "2019-09-02" Rev "v1.0"