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Add schematic symbols and footprints

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* Symbol for LP8867
* Footprint for FerrorCore Inductor DE1205
This commit is contained in:
Mario Hüttel 2021-03-27 16:25:13 +01:00
parent 908138fa81
commit af05a0c963
3 changed files with 65 additions and 0 deletions
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2
README.MD
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@ -31,6 +31,7 @@ Libraries for KiCad.
* TBA1 Traco DC/DC Power Modules * TBA1 Traco DC/DC Power Modules
* LDK220-SOT89 Low noise LDO * LDK220-SOT89 Low noise LDO
* LP2985 150-mA Low-noise Low-dropout Regulator With Shutdown * LP2985 150-mA Low-noise Low-dropout Regulator With Shutdown
* LP8867 LED Switch mode regulator with PWM Control
## stm32f4 ## stm32f4
* STM32F407VGT * STM32F407VGT
@ -195,3 +196,4 @@ Legend:
| Name | Footprint | 3D Model | | Name | Footprint | 3D Model |
| :--------------- | :-------: | :------: | | :--------------- | :-------: | :------: |
| PKM13EPYH4002-B0 | Y | - | | PKM13EPYH4002-B0 | Y | - |

30
footprints/pretty/shimatta_inductor.pretty/FerroCore_DE1205.kicad_mod Normal file
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@ -0,0 +1,30 @@
(module FerroCore_DE1205 (layer F.Cu) (tedit 605F4DB7)
(fp_text reference REF** (at 0 -7.25) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value FerroCore_DE1205 (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 -6.5) (end 6.5 -6.5) (layer F.SilkS) (width 0.12))
(fp_line (start 6.5 -6.5) (end 6.5 -3) (layer F.SilkS) (width 0.12))
(fp_line (start 6.5 3) (end 6.5 6.5) (layer F.SilkS) (width 0.12))
(fp_line (start 6.5 6.5) (end -6.5 6.5) (layer F.SilkS) (width 0.12))
(fp_line (start -6.5 6.5) (end -6.5 3) (layer F.SilkS) (width 0.12))
(fp_line (start -6.5 -3) (end -6.5 -6.5) (layer F.SilkS) (width 0.12))
(fp_line (start -6.5 -6.5) (end 0 -6.5) (layer F.SilkS) (width 0.12))
(fp_arc (start 5.5 -5.5) (end 6 -5.5) (angle -90) (layer F.Fab) (width 0.12))
(fp_arc (start -5.5 -5.5) (end -5.5 -6) (angle -90) (layer F.Fab) (width 0.12))
(fp_arc (start -5.5 5.5) (end -6 5.5) (angle -90) (layer F.Fab) (width 0.12))
(fp_arc (start 5.5 5.5) (end 5.5 6) (angle -90) (layer F.Fab) (width 0.12))
(fp_line (start 6 5.5) (end 6 -5.5) (layer F.Fab) (width 0.12))
(fp_line (start 5.5 -6) (end -5.5 -6) (layer F.Fab) (width 0.12))
(fp_line (start -6 -5.5) (end -6 5.5) (layer F.Fab) (width 0.12))
(fp_line (start -5.5 6) (end 5.5 6) (layer F.Fab) (width 0.12))
(fp_circle (center 0 0) (end 5.385165 0) (layer F.Fab) (width 0.12))
(fp_line (start -6.5 -6.5) (end 6.5 -6.5) (layer F.CrtYd) (width 0.12))
(fp_line (start 6.5 -6.5) (end 6.5 6.5) (layer F.CrtYd) (width 0.12))
(fp_line (start 6.5 6.5) (end -6.5 6.5) (layer F.CrtYd) (width 0.12))
(fp_line (start -6.5 6.5) (end -6.5 -6.5) (layer F.CrtYd) (width 0.12))
(pad 1 smd rect (at -4.9 0) (size 2.8 5.4) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 4.9 0) (size 2.8 5.4) (layers F.Cu F.Paste F.Mask))
)

33
schematics/shimatta_regulators.lib
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@ -72,6 +72,39 @@ X VOUT 5 1000 -100 100 L 50 50 1 1 w
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# LP8867
#
DEF LP8867 U 0 40 Y Y 1 F N
F0 "U" 50 50 50 H V C CNN
F1 "LP8867" 250 50 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S 0 0 750 -1300 0 1 0 f
X VIN 1 -100 -100 100 R 50 50 1 1 W
X ISET 10 -100 -850 100 R 50 50 1 1 B
X GND 11 300 -1400 100 U 50 50 1 1 W
X OUT4 12 850 -750 100 L 50 50 1 1 C
X OUT3 13 850 -650 100 L 50 50 1 1 C
X OUT2 14 850 -550 100 L 50 50 1 1 C
X OUT1 15 850 -450 100 L 50 50 1 1 C
X FB 16 850 -200 100 L 50 50 1 1 I
X PGND 17 600 -1400 100 U 50 50 1 1 W
X SW 18 850 -100 100 L 50 50 1 1 w
X NC 19 -100 -1200 100 R 50 50 1 1 N
X LDO 2 -100 -950 100 R 50 50 1 1 w
X VIN 20 -100 -200 100 R 50 50 1 1 W
X GNDPAD 21 400 -1400 100 U 50 50 1 1 W
X FSET 3 -100 -450 100 R 50 50 1 1 B
X VDDIO/EN 4 -100 -350 100 R 50 50 1 1 W
X FAULT 5 -100 -550 100 R 50 50 1 1 C V
X SYNC 6 -100 -650 100 R 50 50 1 1 I
X PWM 7 -100 -750 100 R 50 50 1 1 I
X NC 8 -100 -1100 100 R 50 50 1 1 N
X GND 9 500 -1400 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# LTC3612-TSSOP # LTC3612-TSSOP
# #
DEF LTC3612-TSSOP U 0 40 Y Y 1 F N DEF LTC3612-TSSOP U 0 40 Y Y 1 F N