Fix definition in STM header file and add header files for drivers
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include/delay.h
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include/delay.h
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#ifndef __DELAY_H__
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#define __DELAY_H__
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#include <stdint.h>
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extern volatile uint32_t tick;
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/**
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* @brief wait for specific time in ms. May not be caleed from interrupt context
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*/
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void delay_ms(uint32_t ms);
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#endif /* __DELAY_H__ */
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43
include/lcd.h
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include/lcd.h
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#ifndef __LCD_H__
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#define __LCD_H__
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#include <stm32f0xx.h>
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#define LCD_DPORT (GPIOA)
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#define LCD_DATA_BIT_OFFSET (0)
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#define LCD_RS (9)
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#define LCD_E (10)
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#define LCD_DATA_MASK (0xFU << LCD_DATA_BIT_OFFSET)
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#define LCD_RS_MASK (1U << LCD_RS)
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#define LCD_E_MASK (1U << LCD_E)
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/**
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* @brief Initialize 4 bit LCD mode. GPIOs have to be set up prior to any call of this function
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*/
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void lcd_init(void);
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/**
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* @brief Clear display
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*/
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void lcd_clear(void);
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/**
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* @brief Set cursor position to 0/0
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*/
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void lcd_home(void);
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/**
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* @brief Set cursor to position \p x \p y
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* @param x Position in line
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* @param y Line
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*/
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void lcd_setcursor(uint8_t x, uint8_t y);
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/**
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* @brief Write string to current cursor position
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* @param String to write
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*/
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void lcd_string(const char *data);
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#endif /* __LCD_H__ */
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@ -365,8 +365,15 @@ typedef struct
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{
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{
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__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: 0x00 */
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__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: 0x00 */
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__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
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__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
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__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
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__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
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__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
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union DR_ {
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__IO uint16_t DR16; /*!< SPI data register, Address offset: 0x0C */
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struct DR8_ {
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__IO uint8_t DR8_1;
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__IO uint8_t DR8_2;
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} DR8;
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} DR;
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__IO uint16_t DR_DUMMY;
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__IO uint32_t CRCPR; /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */
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__IO uint32_t CRCPR; /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */
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__IO uint32_t RXCRCR; /*!< SPI Rx CRC register (not used in I2S mode), Address offset: 0x14 */
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__IO uint32_t RXCRCR; /*!< SPI Rx CRC register (not used in I2S mode), Address offset: 0x14 */
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__IO uint32_t TXCRCR; /*!< SPI Tx CRC register (not used in I2S mode), Address offset: 0x18 */
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__IO uint32_t TXCRCR; /*!< SPI Tx CRC register (not used in I2S mode), Address offset: 0x18 */
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