Fix definition in STM header file and add header files for drivers

This commit is contained in:
Mario Hüttel 2019-10-17 20:16:14 +02:00
parent c7653e0242
commit abdabd8eb7
3 changed files with 65 additions and 2 deletions

13
include/delay.h Normal file
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@ -0,0 +1,13 @@
#ifndef __DELAY_H__
#define __DELAY_H__
#include <stdint.h>
extern volatile uint32_t tick;
/**
* @brief wait for specific time in ms. May not be caleed from interrupt context
*/
void delay_ms(uint32_t ms);
#endif /* __DELAY_H__ */

43
include/lcd.h Normal file
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@ -0,0 +1,43 @@
#ifndef __LCD_H__
#define __LCD_H__
#include <stm32f0xx.h>
#define LCD_DPORT (GPIOA)
#define LCD_DATA_BIT_OFFSET (0)
#define LCD_RS (9)
#define LCD_E (10)
#define LCD_DATA_MASK (0xFU << LCD_DATA_BIT_OFFSET)
#define LCD_RS_MASK (1U << LCD_RS)
#define LCD_E_MASK (1U << LCD_E)
/**
* @brief Initialize 4 bit LCD mode. GPIOs have to be set up prior to any call of this function
*/
void lcd_init(void);
/**
* @brief Clear display
*/
void lcd_clear(void);
/**
* @brief Set cursor position to 0/0
*/
void lcd_home(void);
/**
* @brief Set cursor to position \p x \p y
* @param x Position in line
* @param y Line
*/
void lcd_setcursor(uint8_t x, uint8_t y);
/**
* @brief Write string to current cursor position
* @param String to write
*/
void lcd_string(const char *data);
#endif /* __LCD_H__ */

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@ -366,7 +366,14 @@ typedef struct
__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: 0x00 */
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
union DR_ {
__IO uint16_t DR16; /*!< SPI data register, Address offset: 0x0C */
struct DR8_ {
__IO uint8_t DR8_1;
__IO uint8_t DR8_2;
} DR8;
} DR;
__IO uint16_t DR_DUMMY;
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register (not used in I2S mode), Address offset: 0x14 */
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register (not used in I2S mode), Address offset: 0x18 */