Update page 'M_CAN Driver Usage Device Tree'
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@ -48,11 +48,30 @@ clk = {20 MHz, 40 MHz, 80 MHz}
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It is important, due to internal clock crossings, that *hclk* is always higher or equal to *cclk*.
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## MRAM Config
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### MRAM Config
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The last device tree value configures the setup and layout of the MRAM (message RAM).
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It is an array consisting of eight values:
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```
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bosch,mram-cfg = <offset, 11bit filter, 29 bit filter, RX FIFO 0, RX FIFO 1, RX Buffers, TX event FIFO, TX Buffers (v3.0.x) / TX FIFO Elements (>=v3.1.x)>
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bosch,mram-cfg = <offset, 11bit filter, 29 bit filter, RX FIFO 0, RX FIFO 1, RX Buffers, TX event FIFO, TX Buffers (v3.0.x) / TX FIFO Elements (>=v3.1.x)>;
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```
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The *offset* value defines the address offset in bytes inside the MRAM region. Ensure that the memory regions of different M_CANs with the same MRAM do not overlap each other.
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The remaining values configure the amout of elments for different FIFOs and Buffers.
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#### M_CAN version 3.0.x
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For M_CAN versions 3.0.x, the driver only uses the RX FIFO 0 and 1(!) TX Buffer. Therefore
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It is an array consisting of eight values:
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```
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bosch,mram-cfg = <0x0, 0, 0, 32, 0, 0, 0, 1>;
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```
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is a valid configuration with 32 RX FIFO elements. The other values cna be set to numbers greater than zero according to the user manual. The space will be reserved in the message RAM will not be used by the driver.
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Also it is possible to configure more than 1 TX Buffer. However, only one will be used.
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#### M_CAN version >3.1.x
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For versions greater than 3.1.x the
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