Update page 'M_CAN Driver Usage Device Tree'

Mario Hüttel 2017-04-26 14:17:14 +02:00
parent 0723bd0cf9
commit e0ffd895ee

@ -44,9 +44,9 @@ It is necessary to configure interrupt line 0 of the M_CAN according to your SoC
The M_CAN needs two clocks. The first clock *hclk* is used for the internal bus interface. Thesecond clock *cclk* is used for the CAN communication. It should be one of the following values:
clk = {20 MHz, 40 MHz, 80 MHz}
cclk = {20 MHz, 40 MHz, 80 MHz}
It is important, due to internal clock crossings, that *hclk* is always higher or equal to *cclk*.
It is important, due to internal clock crossings, that *hclk* is always higher than or equal to *cclk*.
### MRAM Config