Update page 'M_CAN Driver Usage Device Tree'
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@ -44,9 +44,9 @@ It is necessary to configure interrupt line 0 of the M_CAN according to your SoC
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The M_CAN needs two clocks. The first clock *hclk* is used for the internal bus interface. Thesecond clock *cclk* is used for the CAN communication. It should be one of the following values:
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clk = {20 MHz, 40 MHz, 80 MHz}
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cclk = {20 MHz, 40 MHz, 80 MHz}
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It is important, due to internal clock crossings, that *hclk* is always higher or equal to *cclk*.
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It is important, due to internal clock crossings, that *hclk* is always higher than or equal to *cclk*.
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### MRAM Config
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