Final changes in layout

This commit is contained in:
Mario Hüttel 2021-02-15 21:10:24 +01:00
parent 9cea170528
commit 0ed3e0fbac

View File

@ -69,7 +69,7 @@
(visible_elements FFFFFF7F) (visible_elements FFFFFF7F)
(pcbplotparams (pcbplotparams
(layerselection 0x010fc_ffffffff) (layerselection 0x010fc_ffffffff)
(usegerberextensions false) (usegerberextensions true)
(usegerberattributes true) (usegerberattributes true)
(usegerberadvancedattributes true) (usegerberadvancedattributes true)
(creategerberjobfile true) (creategerberjobfile true)
@ -91,9 +91,9 @@
(subtractmaskfromsilk false) (subtractmaskfromsilk false)
(outputformat 1) (outputformat 1)
(mirror false) (mirror false)
(drillshape 1) (drillshape 0)
(scaleselection 1) (scaleselection 1)
(outputdirectory "")) (outputdirectory "gerber/"))
) )
(net 0 "") (net 0 "")
@ -4908,9 +4908,9 @@
(fp_text user %R (at 0 0 45) (layer B.Fab) (fp_text user %R (at 0 0 45) (layer B.Fab)
(effects (font (size 0.8 0.8) (thickness 0.12)) (justify mirror)) (effects (font (size 0.8 0.8) (thickness 0.12)) (justify mirror))
) )
(pad 2 smd roundrect (at 1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391) (pad 2 smd roundrect (at 1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2173904347826087)
(net 1 GND) (zone_connect 2)) (net 1 GND) (zone_connect 2))
(pad 1 smd roundrect (at -1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391) (pad 1 smd roundrect (at -1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2173904347826087)
(net 6 +5V) (zone_connect 2)) (net 6 +5V) (zone_connect 2))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
@ -4944,9 +4944,9 @@
(fp_text user %R (at 0 0 90) (layer B.Fab) (fp_text user %R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.8 0.8) (thickness 0.12)) (justify mirror)) (effects (font (size 0.8 0.8) (thickness 0.12)) (justify mirror))
) )
(pad 2 smd roundrect (at 1.475 0 90) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391) (pad 2 smd roundrect (at 1.475 0 90) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2173904347826087)
(net 1 GND)) (net 1 GND))
(pad 1 smd roundrect (at -1.475 0 90) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391) (pad 1 smd roundrect (at -1.475 0 90) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2173904347826087)
(net 6 +5V)) (net 6 +5V))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
@ -4982,7 +4982,7 @@
) )
(pad 2 smd roundrect (at 1.475001 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217) (pad 2 smd roundrect (at 1.475001 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217)
(net 1 GND) (zone_connect 2)) (net 1 GND) (zone_connect 2))
(pad 1 smd roundrect (at -1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391) (pad 1 smd roundrect (at -1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2173904347826087)
(net 6 +5V)) (net 6 +5V))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
@ -5018,7 +5018,7 @@
) )
(pad 2 smd roundrect (at 1.475001 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217) (pad 2 smd roundrect (at 1.475001 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217)
(net 1 GND) (zone_connect 2)) (net 1 GND) (zone_connect 2))
(pad 1 smd roundrect (at -1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391) (pad 1 smd roundrect (at -1.475 0 45) (size 1.15 2.7) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2173904347826087)
(net 6 +5V)) (net 6 +5V))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
@ -5196,9 +5196,9 @@
(fp_text user %R (at 0 0 90) (layer F.Fab) (fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.8 0.8) (thickness 0.12))) (effects (font (size 0.8 0.8) (thickness 0.12)))
) )
(pad 2 smd roundrect (at 1.475 0 270) (size 1.15 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) (pad 2 smd roundrect (at 1.475 0 270) (size 1.15 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2173904347826087)
(net 1 GND)) (net 1 GND))
(pad 1 smd roundrect (at -1.475 0 270) (size 1.15 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) (pad 1 smd roundrect (at -1.475 0 270) (size 1.15 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2173904347826087)
(net 5 +12V)) (net 5 +12V))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
@ -6777,7 +6777,7 @@
(segment (start 120 34.5) (end 118.9 33.4) (width 0.8) (layer B.Cu) (net 60)) (segment (start 120 34.5) (end 118.9 33.4) (width 0.8) (layer B.Cu) (net 60))
(segment (start 125.753863 72.566363) (end 125.7125 72.525) (width 0.3) (layer B.Cu) (net 62)) (segment (start 125.753863 72.566363) (end 125.7125 72.525) (width 0.3) (layer B.Cu) (net 62))
(zone (net 1) (net_name GND) (layer F.Cu) (tstamp 0) (hatch edge 0.508) (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 602AD5F2) (hatch edge 0.508)
(connect_pads (clearance 0.3)) (connect_pads (clearance 0.3))
(min_thickness 0.254) (min_thickness 0.254)
(fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
@ -8488,7 +8488,7 @@
) )
) )
) )
(zone (net 1) (net_name GND) (layer B.Cu) (tstamp 600C231C) (hatch edge 0.508) (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 602AD5EF) (hatch edge 0.508)
(connect_pads (clearance 0.3)) (connect_pads (clearance 0.3))
(min_thickness 0.254) (min_thickness 0.254)
(fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
@ -9850,7 +9850,7 @@
) )
) )
) )
(zone (net 6) (net_name +5V) (layer B.Cu) (tstamp 0) (hatch edge 0.508) (zone (net 6) (net_name +5V) (layer B.Cu) (tstamp 602AD5EC) (hatch edge 0.508)
(priority 1) (priority 1)
(connect_pads (clearance 0.3)) (connect_pads (clearance 0.3))
(min_thickness 0.254) (min_thickness 0.254)
@ -9936,7 +9936,7 @@
) )
) )
) )
(zone (net 5) (net_name +12V) (layer B.Cu) (tstamp 0) (hatch edge 0.508) (zone (net 5) (net_name +12V) (layer B.Cu) (tstamp 602AD5E9) (hatch edge 0.508)
(priority 1) (priority 1)
(connect_pads yes (clearance 0.3)) (connect_pads yes (clearance 0.3))
(min_thickness 0.3) (min_thickness 0.3)
@ -9957,7 +9957,7 @@
) )
) )
) )
(zone (net 5) (net_name +12V) (layer B.Cu) (tstamp 0) (hatch edge 0.508) (zone (net 5) (net_name +12V) (layer B.Cu) (tstamp 602AD5E6) (hatch edge 0.508)
(priority 1) (priority 1)
(connect_pads (clearance 0.3)) (connect_pads (clearance 0.3))
(min_thickness 0.254) (min_thickness 0.254)