reflow-oven-control-sw/stm-firmware/stm-periph/uart.c

/* Reflow Oven Controller
 *
 * Copyright (C) 2020  Mario Hüttel <mario.huettel@gmx.net>
 *
 * This file is part of the Reflow Oven Controller Project.
 *
 * The reflow oven controller is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * GDSII-Converter is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with the reflow oven controller project.
 * If not, see <http://www.gnu.org/licenses/>.
 */

#include <stm-periph/uart.h>
#include <stm32/stm32f4xx.h>
#include <stm-periph/clock-enable-manager.h>
#include <stm-periph/stm32-gpio-macros.h>
#include <stm-periph/dma-ring-buffer.h>
#include <string.h>

static struct dma_ring_buffer_to_mem ring_buff_rx;
static struct dma_ring_buffer_to_periph ring_buff_tx;
static char uart_rx_buffer[64];
static char uart_tx_buffer[256];

#ifdef DEBUGBUILD
static inline void uart_gpio_config()
{
	rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
	UART_PORT->MODER &=  MODER_DELETE(UART_TX_PIN) & MODER_DELETE(UART_RX_PIN);
	UART_PORT->MODER |= ALTFUNC(UART_RX_PIN) | ALTFUNC(UART_TX_PIN);
	SETAF(UART_PORT, UART_RX_PIN, UART_RX_PIN_ALTFUNC);
	SETAF(UART_PORT, UART_TX_PIN, UART_TX_PIN_ALTFUNC);
}
#endif

void uart_init_with_dma()
{
	rcc_manager_enable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
#ifdef DEBUGBUILD
	uart_gpio_config();
#endif
	UART_PERIPH->BRR = UART_BRR_REG_VALUE;
	UART_PERIPH->CR3 = USART_CR3_DMAR | USART_CR3_DMAT;
	UART_PERIPH->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE;

	dma_ring_buffer_periph_to_mem_initialize(&ring_buff_rx, 2, UART_RECEIVE_DMA_STREAM, sizeof(uart_rx_buffer), 1U,
						 uart_rx_buffer, (char *)&UART_PERIPH->DR, 4);
	dma_ring_buffer_mem_to_periph_initialize(&ring_buff_tx, 2, UART_SEND_DMA_STREAM, sizeof(uart_tx_buffer), 1U,
						 uart_tx_buffer, 4U, (void *)&UART_PERIPH->DR);

	NVIC_EnableIRQ(DMA2_Stream7_IRQn);
}

void uart_disable()
{
	UART_PERIPH->CR1 = 0;
	UART_PERIPH->CR2 = 0;
	UART_PERIPH->CR3 = 0;
	dma_ring_buffer_periph_to_mem_stop(&ring_buff_rx);
	dma_ring_buffer_mem_to_periph_stop(&ring_buff_tx);
	rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(UART_PORT_RCC_MASK));
	rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(UART_RCC_MASK));
}

void uart_send_char(char c)
{
	while(!(UART_PERIPH->SR & USART_SR_TXE));
	UART_PERIPH->DR = c;
}

void uart_send_array(const char *data, uint32_t len)
{
	uint32_t i;

	for (i = 0; i < len; i++)
		uart_send_char(data[i]);
}

void uart_send_string(const char *string)
{
	int i;

	for (i = 0; string[i] != '\0'; i++)
		uart_send_char(string[i]);
}

void uart_send_array_with_dma(const char *data, uint32_t len)
{
	dma_ring_buffer_mem_to_periph_insert_data(&ring_buff_tx, data, len);
}

void uart_send_string_with_dma(const char *string)
{
	size_t len;

	len = strlen(string);
	uart_send_array_with_dma(string, (uint32_t)len);
}

int uart_receive_data_with_dma(const char **data, size_t *len)
{
	return dma_ring_buffer_periph_to_mem_get_data(&ring_buff_rx, (const volatile void **)data, len);
}

void DMA2_Stream7_IRQHandler()
{
	uint32_t hisr = DMA2->HISR;
	DMA2->HIFCR = hisr;

	if (hisr & DMA_HISR_TCIF7) {
		dma_ring_buffer_mem_to_periph_int_callback(&ring_buff_tx);
	}
}