Move PT1000 Measurement from ADC1 to ADC3 in order to make ADC1 free for Safety ADC implementation
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@ -70,12 +70,12 @@ static inline void adc_pt1000_setup_sample_frequency_timer()
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static inline void adc_pt1000_disable_adc()
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{
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ADC1->CR2 &= ~ADC_CR2_ADON;
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ADC_PT1000_PERIPH->CR2 &= ~ADC_CR2_ADON;
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DMA2_Stream0->CR = 0;
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pt1000_error |= ADC_PT1000_INACTIVE;
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rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC1EN));
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rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC3EN));
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rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(ADC_PT1000_PORT_RCC_MASK));
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}
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@ -99,7 +99,7 @@ static inline void adc_pt1000_enable_dma_stream()
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DMA2_Stream0->M0AR = (uint32_t)dma_sample_buffer;
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/* Source is the ADC data register */
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DMA2_Stream0->PAR = (uint32_t)&ADC1->DR;
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DMA2_Stream0->PAR = (uint32_t)&ADC_PT1000_PERIPH->DR;
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/* Transfer size is ADC_PT1000_DMA_AVG_SAMPLES */
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DMA2_Stream0->NDTR = ADC_PT1000_DMA_AVG_SAMPLES;
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@ -112,7 +112,7 @@ static inline void adc_pt1000_enable_dma_stream()
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* Todo: Maybe use twice as big of a buffer and also use half-fill interrupt in order to prevent overruns
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*/
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DMA2_Stream0->CR = DMA_SxCR_PL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC |
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DMA_SxCR_CIRC | DMA_SxCR_TCIE | DMA_SxCR_TEIE | DMA_SxCR_EN;
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DMA_SxCR_CIRC | DMA_SxCR_TCIE | DMA_SxCR_TEIE | DMA_SxCR_EN | ((ADC_PT1000_CHANNEL & 0x7)<<25);
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}
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static inline void adc_pt1000_disable_dma_stream()
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@ -129,32 +129,32 @@ static inline void adc_pt1000_disable_dma_stream()
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void adc_pt1000_setup_meas()
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{
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rcc_manager_enable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC1EN));
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rcc_manager_enable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC3EN));
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rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(ADC_PT1000_PORT_RCC_MASK));
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ADC_PT1000_PORT->MODER |= ANALOG(ADC_PT1000_PIN);
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/* Set S&H time for PT1000 ADC channel */
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#if ADC_PT1000_CHANNEL < 10
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ADC1->SMPR2 |= (7U << (3*ADC_PT1000_CHANNEL));
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ADC_PT1000_PERIPH->SMPR2 |= (7U << (3*ADC_PT1000_CHANNEL));
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#else
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ADC1->SMPR1 |= (7U << (3*(ADC_PT1000_CHANNEL-10)));
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ADC_PT1000_PERIPH->SMPR1 |= (7U << (3*(ADC_PT1000_CHANNEL-10)));
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#endif
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ADC->CCR |= (0x2<<16);
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ADC->CCR |= (0x3<<16);
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/* Set watchdog limits */
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ADC1->HTR = ADC_PT1000_UPPER_WATCHDOG;
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ADC1->LTR = ADC_PT1000_LOWER_WATCHDOG;
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ADC_PT1000_PERIPH->HTR = ADC_PT1000_UPPER_WATCHDOG;
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ADC_PT1000_PERIPH->LTR = ADC_PT1000_LOWER_WATCHDOG;
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/* Set length of sequence to 1 */
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ADC1->SQR1 = (0UL<<20);
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ADC_PT1000_PERIPH->SQR1 = (0UL<<20);
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/* Set channel as 1st element in sequence */
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ADC1->SQR3 = (ADC_PT1000_CHANNEL<<0);
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ADC_PT1000_PERIPH->SQR3 = (ADC_PT1000_CHANNEL<<0);
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ADC1->CR1 = ADC_CR1_OVRIE | ADC_CR1_AWDEN | ADC_CR1_AWDIE;
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ADC1->CR2 = ADC_CR2_EXTEN_0 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_ADON | ADC_CR2_DMA | ADC_CR2_DDS;
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ADC_PT1000_PERIPH->CR1 = ADC_CR1_OVRIE | ADC_CR1_AWDEN | ADC_CR1_AWDIE;
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ADC_PT1000_PERIPH->CR2 = ADC_CR2_EXTEN_0 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_ADON | ADC_CR2_DMA | ADC_CR2_DDS;
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adc_pt1000_set_moving_average_filter_param(ADC_PT1000_FILTER_WEIGHT);
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adc_pt1000_set_resistance_calibration(0, 0, false);
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@ -324,17 +324,17 @@ void ADC_IRQHandler(void)
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{
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uint32_t adc1_sr;
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adc1_sr = ADC1->SR;
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adc1_sr = ADC_PT1000_PERIPH->SR;
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if (adc1_sr & ADC_SR_OVR) {
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ADC1->SR &= ~ADC_SR_OVR;
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ADC_PT1000_PERIPH->SR &= ~ADC_SR_OVR;
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pt1000_error |= ADC_PT1000_OVERFLOW;
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/* Disable ADC in case of overrrun*/
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adc_pt1000_disable();
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}
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if (adc1_sr & ADC_SR_AWD) {
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ADC1->SR &= ~ADC_SR_AWD;
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ADC_PT1000_PERIPH->SR &= ~ADC_SR_AWD;
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adc_watchdog_counter++;
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if (adc_watchdog_counter >= ADC_PT1000_WATCHDOG_SAMPLE_COUNT)
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pt1000_error |= ADC_PT1000_WATCHDOG_ERROR;
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@ -24,6 +24,11 @@
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#include <stdbool.h>
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#include <stdint.h>
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#include <stm32/stm32f4xx.h>
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/*If this is changed, change DMA code to fit the channel assignment! */
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#define ADC_PT1000_PERIPH ADC3
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#define ADC_PT1000_DMA2_STREAM0_CHANNEL 2
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/**
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* @brief Moving average filter coefficient for PT1000 measurement
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*/
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