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10 Commits
Author | SHA1 | Date | |
---|---|---|---|
5c429ec894 | |||
62ef147105 | |||
c6038969ca | |||
0c8a0cd562 | |||
1300fe88a4 | |||
df593e2ab2 | |||
34ad930bd8 | |||
1c1874abf1 | |||
fd2994f9b9 | |||
b6befa70a2 |
@ -69,6 +69,7 @@ enum safety_flag {
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ERR_FLAG_FLASH_CRC_DATA = (1<<20),
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ERR_FLAG_FLASH_CRC_DATA = (1<<20),
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ERR_FLAG_CFG_CRC_MEAS_ADC = (1<<21),
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ERR_FLAG_CFG_CRC_MEAS_ADC = (1<<21),
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ERR_FLAG_CFG_CRC_SAFETY_ADC = (1<<22),
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ERR_FLAG_CFG_CRC_SAFETY_ADC = (1<<22),
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ERR_FLAG_CFG_CRC_MISC = (1<<23),
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};
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};
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/**
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/**
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@ -87,6 +88,7 @@ enum timing_monitor {
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enum crc_monitor {
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enum crc_monitor {
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ERR_CRC_MON_MEAS_ADC = 0,
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ERR_CRC_MON_MEAS_ADC = 0,
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ERR_CRC_MON_SAFETY_ADC,
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ERR_CRC_MON_SAFETY_ADC,
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ERR_CRC_MON_MISC,
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N_ERR_CRC_MON
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N_ERR_CRC_MON
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};
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};
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@ -124,7 +126,15 @@ enum analog_value_monitor {
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#define WATCHDOG_HALT_DEBUG (0)
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#define WATCHDOG_HALT_DEBUG (0)
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#endif
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#endif
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#define WATCHDOG_PRESCALER 16
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/**
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* @brief Watchdog clock prescaler value
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*/
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#define WATCHDOG_PRESCALER (16)
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/**
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* @brief Watchdog reload value
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*/
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#define WATCHDOG_RELOAD_VALUE (2500)
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/**
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/**
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* @brief Minimum number of bytes that have to be free on the stack. If this is not the case, an error is detected
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* @brief Minimum number of bytes that have to be free on the stack. If this is not the case, an error is detected
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@ -167,6 +177,12 @@ enum analog_value_monitor {
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*/
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*/
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#define SAFETY_CRC_MON_SAFETY_ADC_PW 0xA8DF2368
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#define SAFETY_CRC_MON_SAFETY_ADC_PW 0xA8DF2368
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/**
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* @brief Password for resetting ERR_CRC_MON_MISC
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*
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*/
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#define SAFETY_CRC_MON_MISC_PW 0x9A62E96A
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/**
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/**
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* @brief Default persistence of safety flags. These values are loaded into the safety tables on startup.
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* @brief Default persistence of safety flags. These values are loaded into the safety tables on startup.
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*/
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*/
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@ -192,7 +208,8 @@ enum analog_value_monitor {
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_FLASH_CRC_CODE, true), \
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_FLASH_CRC_CODE, true), \
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_FLASH_CRC_DATA, true), \
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_FLASH_CRC_DATA, true), \
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_CFG_CRC_MEAS_ADC, true), \
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_CFG_CRC_MEAS_ADC, true), \
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_CFG_CRC_SAFETY_ADC, true)
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_CFG_CRC_SAFETY_ADC, true), \
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ERR_FLAG_PERSIST_ENTRY(ERR_FLAG_CFG_CRC_MISC, true),
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/**
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/**
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* @brief Default config weights of safety flags. These values are loaded into the safety tables on startup.
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* @brief Default config weights of safety flags. These values are loaded into the safety tables on startup.
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*/
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*/
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@ -218,6 +235,7 @@ enum analog_value_monitor {
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_FLASH_CRC_CODE, SAFETY_FLAG_CONFIG_WEIGHT_PANIC), \
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_FLASH_CRC_CODE, SAFETY_FLAG_CONFIG_WEIGHT_PANIC), \
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_FLASH_CRC_DATA, SAFETY_FLAG_CONFIG_WEIGHT_PANIC), \
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_FLASH_CRC_DATA, SAFETY_FLAG_CONFIG_WEIGHT_PANIC), \
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_CFG_CRC_MEAS_ADC, SAFETY_FLAG_CONFIG_WEIGHT_PID), \
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_CFG_CRC_MEAS_ADC, SAFETY_FLAG_CONFIG_WEIGHT_PID), \
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_CFG_CRC_SAFETY_ADC, SAFETY_FLAG_CONFIG_WEIGHT_PANIC)
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_CFG_CRC_SAFETY_ADC, SAFETY_FLAG_CONFIG_WEIGHT_PANIC), \
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ERR_FLAG_WEIGHT_ENTRY(ERR_FLAG_CFG_CRC_MISC, SAFETY_FLAG_CONFIG_WEIGHT_PANIC)
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#endif /* __SAFETY_CONFIG_H__ */
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#endif /* __SAFETY_CONFIG_H__ */
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@ -27,11 +27,19 @@
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/**
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/**
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* @brief Setup the watchdog for the safety controller
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* @brief Setup the watchdog for the safety controller
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* @param Prescaler to use for the 32 KHz LSI clock
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*
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* The watchdog timeout can be calculated with:
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* \f[ t = \frac{(\mathrm{RELOAD_VAL} + 1)\cdot \mathrm{PRESCALER}}{32000 } s\f]
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*
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* Valid prescaler values are: 4, 8, 16, 32, 64, 128, 256.
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* @param prescaler Prescaler to use for the 32 KHz LSI clock
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* @param reload_value Reload value to reload the timer with when reset. 0 to 0xFFF
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* @return 0 if successful
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* @return 0 if successful
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* @return -1 if prescaler is wrong
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* @return -2 if a reload value > 0xFFF is selected. 0xFFF will be used in this case
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* @note Once the watchdog is enabled, it cannot be turned off!
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* @note Once the watchdog is enabled, it cannot be turned off!
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*/
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*/
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int watchdog_setup(uint8_t prescaler);
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int watchdog_setup(uint16_t prescaler, uint16_t reload_value);
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/**
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/**
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* @brief Reset watchdog counter
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* @brief Reset watchdog counter
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@ -23,6 +23,7 @@
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* @brief Main file for firmware
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* @brief Main file for firmware
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*/
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*/
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#include "reflow-controller/safety/safety-config.h"
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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@ -215,6 +216,9 @@ static inline void setup_system(void)
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/** - Enable the ADC for PT1000 measurement */
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/** - Enable the ADC for PT1000 measurement */
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adc_pt1000_setup_meas();
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adc_pt1000_setup_meas();
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/** - Enable the misc CRC config monitor to supervise clock, systick and flash settings */
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(void)safety_controller_set_crc_monitor(ERR_CRC_MON_MISC, SAFETY_CRC_MON_MISC_PW);
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}
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}
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/**
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/**
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@ -23,6 +23,7 @@
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* @{
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* @{
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*/
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*/
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#include "stm32/stm32f407xx.h"
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#include <reflow-controller/safety/safety-controller.h>
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#include <reflow-controller/safety/safety-controller.h>
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#include <reflow-controller/safety/safety-config.h>
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#include <reflow-controller/safety/safety-config.h>
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#include <reflow-controller/safety/watchdog.h>
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#include <reflow-controller/safety/watchdog.h>
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@ -163,9 +164,15 @@ struct crc_monitor_register {
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#define CRC_MON_REGISTER_ENTRY(_addr, _mask, _size) {.reg_addr = &(_addr), .mask = (_mask), .size = (_size)}
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#define CRC_MON_REGISTER_ENTRY(_addr, _mask, _size) {.reg_addr = &(_addr), .mask = (_mask), .size = (_size)}
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/**
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* @brief Sentinel Element for crc monitor register list
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*
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*/
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#define CRC_MON_REGISTER_SENTINEL {.reg_addr = NULL, .mask = 0, .size = 0}
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struct crc_mon {
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struct crc_mon {
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/**
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/**
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* @brief Array of registers to monitor. Terminated by NULL sentinel!
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* @brief Array of registers to monitor. Terminated by NULL sentinel @ref CRC_MON_REGISTER_SENTINEL
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*/
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*/
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const struct crc_monitor_register *registers;
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const struct crc_monitor_register *registers;
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const enum crc_monitor monitor;
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const enum crc_monitor monitor;
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@ -204,6 +211,7 @@ static volatile struct error_flag IN_SECTION(.ccm.data) flags[] = {
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ERR_FLAG_ENTRY(ERR_FLAG_FLASH_CRC_DATA),
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ERR_FLAG_ENTRY(ERR_FLAG_FLASH_CRC_DATA),
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ERR_FLAG_ENTRY(ERR_FLAG_CFG_CRC_MEAS_ADC),
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ERR_FLAG_ENTRY(ERR_FLAG_CFG_CRC_MEAS_ADC),
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ERR_FLAG_ENTRY(ERR_FLAG_CFG_CRC_SAFETY_ADC),
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ERR_FLAG_ENTRY(ERR_FLAG_CFG_CRC_SAFETY_ADC),
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ERR_FLAG_ENTRY(ERR_FLAG_CFG_CRC_MISC),
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};
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};
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/**
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/**
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@ -291,7 +299,7 @@ static const struct crc_monitor_register meas_adc_crc_regs[] = {
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ADC_SQR2_SQ8 | ADC_SQR2_SQ7, 4),
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ADC_SQR2_SQ8 | ADC_SQR2_SQ7, 4),
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CRC_MON_REGISTER_ENTRY(ADC_PT1000_PERIPH->SQR3, ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4 |
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CRC_MON_REGISTER_ENTRY(ADC_PT1000_PERIPH->SQR3, ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4 |
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ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1, 4),
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ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1, 4),
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{NULL, 0, 0}
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CRC_MON_REGISTER_SENTINEL
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};
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};
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static const struct crc_monitor_register safety_adc_crc_regs[] = {
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static const struct crc_monitor_register safety_adc_crc_regs[] = {
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@ -307,7 +315,24 @@ static const struct crc_monitor_register safety_adc_crc_regs[] = {
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ADC_SQR2_SQ8 | ADC_SQR2_SQ7, 4),
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ADC_SQR2_SQ8 | ADC_SQR2_SQ7, 4),
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CRC_MON_REGISTER_ENTRY(SAFETY_ADC_ADC_PERIPHERAL->SQR3, ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4 |
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CRC_MON_REGISTER_ENTRY(SAFETY_ADC_ADC_PERIPHERAL->SQR3, ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4 |
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ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1, 4),
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ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1, 4),
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{NULL, 0, 0}
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CRC_MON_REGISTER_ENTRY(RCC->APB2ENR, SAFETY_ADC_ADC_RCC_MASK, 4),
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CRC_MON_REGISTER_SENTINEL
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};
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static const struct crc_monitor_register misc_config_crc_regs[] = {
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/* Check clock tree settings */
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CRC_MON_REGISTER_ENTRY(RCC->CR, RCC_CR_PLLON | RCC_CR_HSEON | RCC_CR_PLLI2SON | RCC_CR_HSION, 4),
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CRC_MON_REGISTER_ENTRY(RCC->CSR, RCC_CSR_LSION, 4),
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CRC_MON_REGISTER_ENTRY(RCC->CFGR, RCC_CFGR_SWS | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2, 4),
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CRC_MON_REGISTER_ENTRY(RCC->PLLCFGR, RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLQ | RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLP | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLM , 4),
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/* Check Flash settings */
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CRC_MON_REGISTER_ENTRY(FLASH->ACR, FLASH_ACR_LATENCY | FLASH_ACR_DCEN | FLASH_ACR_ICEN | FLASH_ACR_PRFTEN, 4),
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/* Check vector table offset */
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CRC_MON_REGISTER_ENTRY(SCB->VTOR, 0xFFFFFFFF, 4),
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/* Check system tick configuration */
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CRC_MON_REGISTER_ENTRY(SysTick->CTRL, SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk, 4),
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CRC_MON_REGISTER_ENTRY(SysTick->LOAD, 0xFFFFFFFF, 4),
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CRC_MON_REGISTER_SENTINEL
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};
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};
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static struct crc_mon IN_SECTION(.ccm.data) crc_monitors[] = {
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static struct crc_mon IN_SECTION(.ccm.data) crc_monitors[] = {
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@ -331,6 +356,16 @@ static struct crc_mon IN_SECTION(.ccm.data) crc_monitors[] = {
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.last_crc = 0UL,
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.last_crc = 0UL,
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.active = false,
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.active = false,
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},
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},
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{
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.registers = misc_config_crc_regs,
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.monitor = ERR_CRC_MON_MISC,
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.pw = SAFETY_CRC_MON_MISC_PW,
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.flag_to_set = ERR_FLAG_CFG_CRC_MISC,
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.expected_crc = 0UL,
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.expected_crc_inv = ~0UL,
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.last_crc = 0UL,
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.active = false,
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}
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};
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};
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/**
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/**
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@ -938,7 +973,7 @@ void safety_controller_init(void)
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MEAS_ADC_SAFETY_FLAG_KEY);
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MEAS_ADC_SAFETY_FLAG_KEY);
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safety_adc_init();
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safety_adc_init();
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watchdog_setup(WATCHDOG_PRESCALER);
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(void)watchdog_setup(WATCHDOG_PRESCALER, WATCHDOG_RELOAD_VALUE);
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|
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if (rcc_manager_get_reset_cause(false) & RCC_RESET_SOURCE_IWDG)
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if (rcc_manager_get_reset_cause(false) & RCC_RESET_SOURCE_IWDG)
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safety_controller_report_error(ERR_FLAG_WTCHDG_FIRED);
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safety_controller_report_error(ERR_FLAG_WTCHDG_FIRED);
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@ -42,9 +42,10 @@
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*/
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*/
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#define STM32_WATCHDOG_REGISTER_ACCESS_KEY 0x5555
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#define STM32_WATCHDOG_REGISTER_ACCESS_KEY 0x5555
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|
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int watchdog_setup(uint8_t prescaler)
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int watchdog_setup(uint16_t prescaler, uint16_t reload_value)
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{
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{
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uint32_t prescaler_reg_val;
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uint32_t prescaler_reg_val;
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int ret = 0;
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/** - Activate the LSI oscillator */
|
/** - Activate the LSI oscillator */
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RCC->CSR |= RCC_CSR_LSION;
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RCC->CSR |= RCC_CSR_LSION;
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@ -53,20 +54,24 @@ int watchdog_setup(uint8_t prescaler)
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while (!(RCC->CSR & RCC_CSR_LSIRDY))
|
while (!(RCC->CSR & RCC_CSR_LSIRDY))
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;
|
;
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|
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if (prescaler == 4U)
|
if (prescaler == 4U) {
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prescaler_reg_val = 0UL;
|
prescaler_reg_val = 0UL;
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else if (prescaler == 8U)
|
} else if (prescaler == 8U) {
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prescaler_reg_val = 1UL;
|
prescaler_reg_val = 1UL;
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else if (prescaler == 16U)
|
} else if (prescaler == 16U) {
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prescaler_reg_val = 2UL;
|
prescaler_reg_val = 2UL;
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else if (prescaler == 32U)
|
} else if (prescaler == 32U) {
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prescaler_reg_val = 3UL;
|
prescaler_reg_val = 3UL;
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else if (prescaler == 64U)
|
} else if (prescaler == 64U) {
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prescaler_reg_val = 4UL;
|
prescaler_reg_val = 4UL;
|
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else if (prescaler == 128U)
|
} else if (prescaler == 128U) {
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prescaler_reg_val = 5UL;
|
prescaler_reg_val = 5UL;
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else
|
} else if (prescaler == 256U) {
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prescaler_reg_val = 6UL;
|
prescaler_reg_val = 6UL;
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|
} else {
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|
prescaler_reg_val = 6UL;
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|
ret = -1;
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|
}
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|
|
||||||
/** - (De)activate the watchdog during debug access according to @ref WATCHDOG_HALT_DEBUG */
|
/** - (De)activate the watchdog during debug access according to @ref WATCHDOG_HALT_DEBUG */
|
||||||
if (WATCHDOG_HALT_DEBUG)
|
if (WATCHDOG_HALT_DEBUG)
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@ -88,8 +93,12 @@ int watchdog_setup(uint8_t prescaler)
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|||||||
while (IWDG->SR & IWDG_SR_RVU)
|
while (IWDG->SR & IWDG_SR_RVU)
|
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;
|
;
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|
|
||||||
/** - Set reload value fixed to 0xFFF */
|
/** - Set reload value */
|
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IWDG->RLR = 0xFFFU;
|
if (reload_value > 0xFFFu) {
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|
reload_value = 0xFFFFu;
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|
ret = -2;
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|
}
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|
IWDG->RLR = reload_value;
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|
|
||||||
/** - Write enable key */
|
/** - Write enable key */
|
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IWDG->KR = STM32_WATCHDOG_ENABLE_KEY;
|
IWDG->KR = STM32_WATCHDOG_ENABLE_KEY;
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@ -97,7 +106,7 @@ int watchdog_setup(uint8_t prescaler)
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|||||||
/** - Do a first reset of the counter. This also locks the config regs */
|
/** - Do a first reset of the counter. This also locks the config regs */
|
||||||
watchdog_ack(WATCHDOG_MAGIC_KEY);
|
watchdog_ack(WATCHDOG_MAGIC_KEY);
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||||||
|
|
||||||
return 0;
|
return ret;
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||||||
}
|
}
|
||||||
|
|
||||||
int watchdog_ack(uint32_t magic)
|
int watchdog_ack(uint32_t magic)
|
||||||
|
@ -2,7 +2,7 @@ project(updater-ram-code)
|
|||||||
set(CMAKE_SYSTEM_NAME Generic)
|
set(CMAKE_SYSTEM_NAME Generic)
|
||||||
set(CMAKE_SYSTEM_PROCESSOR arm)
|
set(CMAKE_SYSTEM_PROCESSOR arm)
|
||||||
set(CMAKE_CROSSCOMPILING 1)
|
set(CMAKE_CROSSCOMPILING 1)
|
||||||
cmake_minimum_required(VERSION 3.0)
|
cmake_minimum_required(VERSION 3.18)
|
||||||
|
|
||||||
set(CMAKE_TOOLCHAIN_FILE "arm-none-eabi-gcc.cmake")
|
set(CMAKE_TOOLCHAIN_FILE "arm-none-eabi-gcc.cmake")
|
||||||
|
|
||||||
|
@ -1,35 +1,45 @@
|
|||||||
#!env python
|
#!env python
|
||||||
|
|
||||||
# Convert a file to a c array
|
"""
|
||||||
# bin2carray <output file> <input file>
|
Convert a file to a c array
|
||||||
|
bin2carray <output file> <input file>
|
||||||
|
"""
|
||||||
|
|
||||||
import os
|
import os
|
||||||
import os.path
|
import os.path
|
||||||
import sys
|
import sys
|
||||||
|
|
||||||
if len(sys.argv) < 3:
|
def main():
|
||||||
sys.exit(-1)
|
"""
|
||||||
|
Main script function
|
||||||
|
"""
|
||||||
|
if len(sys.argv) < 3:
|
||||||
|
return -1
|
||||||
|
|
||||||
source_file = sys.argv[2]
|
source_file = sys.argv[2]
|
||||||
dest_file = sys.argv[1]
|
dest_file = sys.argv[1]
|
||||||
|
|
||||||
print("%s --> %s" % (source_file, dest_file))
|
print(f'{source_file} --> {dest_file}')
|
||||||
|
|
||||||
with open(source_file, "rb") as src:
|
with open(source_file, 'rb') as src:
|
||||||
data = src.read()
|
data = src.read()
|
||||||
|
|
||||||
with open(dest_file, "w") as dest:
|
with open(dest_file, 'w', encoding='utf-8') as dest:
|
||||||
header_guard = "__" + os.path.basename(dest_file).replace('.', '_').replace('-', '_') + "_H__"
|
header_guard = '_' + os.path.basename(dest_file).replace('.', '_').replace('-', '_') + '_H_'
|
||||||
dest.write("#ifndef %s\n" % (header_guard))
|
header_guard = header_guard.upper()
|
||||||
dest.write("#define %s\n" % (header_guard))
|
dest.write(f'#ifndef {header_guard}\n')
|
||||||
dest.write("static const char binary_blob[%d] = {\n" % (len(data)))
|
dest.write(f'#define {header_guard}\n')
|
||||||
for current,idx in zip(data, range(len(data))):
|
dest.write(f'static const char binary_blob[{len(data)}] = {{\n')
|
||||||
if ((idx+1) % 4 == 0):
|
for idx, current in enumerate(data, start=1):
|
||||||
dest.write(hex(current)+",\n")
|
if idx % 4 == 0:
|
||||||
|
dest.write(hex(current)+',\n')
|
||||||
else:
|
else:
|
||||||
dest.write(hex(current)+",")
|
dest.write(hex(current)+',')
|
||||||
|
|
||||||
dest.write("};\n")
|
dest.write('};\n')
|
||||||
dest.write("#endif /* %s */\n" % (header_guard))
|
dest.write(f'#endif /* {header_guard} */\n')
|
||||||
|
|
||||||
sys.exit(0)
|
return 0
|
||||||
|
|
||||||
|
if __name__ == '__main__':
|
||||||
|
sys.exit(main())
|
||||||
|
Loading…
Reference in New Issue
Block a user