Update foo
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@ -39,21 +39,21 @@ int SDIO_send_cmd(uint8_t CMD, uint32_t arg, uint8_t expectedAns);
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int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t* responseBuffer);
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int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t* responseBuffer);
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void SDIO_wait_cmd_sent();
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void SDIO_wait_cmd_sent(void);
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ACMD41_RESP_t SDIO_init_card_ACMD41(uint8_t HCS);
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ACMD41_RESP_t SDIO_init_card_ACMD41(uint8_t HCS);
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int SDIO_switch_appmode_CMD55();
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int SDIO_switch_appmode_CMD55(void);
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int SDIO_send_all_send_cid_CMD2();
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int SDIO_send_all_send_cid_CMD2(void);
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int SDIO_send_relative_address_CMD3(uint16_t* rca);
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int SDIO_send_relative_address_CMD3(uint16_t* rca);
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int SDIO_send_go_idle_CMD0();
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int SDIO_send_go_idle_CMD0(void);
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CMD8_RESP_t SDIO_send_iface_condition_CMD8();
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CMD8_RESP_t SDIO_send_iface_condition_CMD8(void);
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int SDIO_send_block_length_CMD16(uint32_t blocklen);
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int SDIO_send_block_length_CMD16(uint32_t blocklen);
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int SDIO_send_bus_width_ACMD6(uint8_t bus_width);
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int SDIO_send_bus_width_ACMD6(uint8_t bus_width);
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int SDIO_send_csd_CMD9(uint16_t rca, uint32_t *responsebuffer);
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int SDIO_send_csd_CMD9(uint16_t rca, uint32_t *responsebuffer);
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int SDIO_send_select_card_CMD7(uint16_t rca);
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int SDIO_send_select_card_CMD7(uint16_t rca);
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int SDIO_check_status_register_CMD13(uint16_t rca, uint32_t *status);
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int SDIO_check_status_register_CMD13(uint16_t rca, uint32_t *status);
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void SDIO_init_detect_pins();
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void SDIO_init_detect_pins(void);
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int checkNotInserted(); // Returns 0 if inserted!
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int checkNotInserted(void); // Returns 0 if inserted!
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int checkWriteProtection(); // returns 0 if write protected
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int checkWriteProtection(void); // returns 0 if write protected
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void switchPrescaler(uint8_t clkdiv);
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void switchPrescaler(uint8_t clkdiv);
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int SDIO_send_write_block_CMD24(uint32_t addr);
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int SDIO_send_write_block_CMD24(uint32_t addr);
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int SDIO_send_read_block_CMD17(uint32_t addr);
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int SDIO_send_read_block_CMD17(uint32_t addr);
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@ -14,7 +14,7 @@
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//Initial Transfer CLK (ca. 400kHz)
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//Initial Transfer CLK (ca. 400kHz)
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#define INITCLK 130 //120
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#define INITCLK 130 //120
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//Working CLK (Maximum)
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//Working CLK (Maximum)
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#define WORKCLK 255 //0
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#define WORKCLK 50 //0
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//Data Timeout in CLK Cycles
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//Data Timeout in CLK Cycles
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#define DTIMEOUT 0x3000 //150
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#define DTIMEOUT 0x3000 //150
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//DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
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//DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
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2
main.c
2
main.c
@ -12,7 +12,7 @@
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#include <stdio.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdint.h>
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#define OUTPUT(pin) (0b01 << (pin * 2))
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#define OUTPUT(pin) (0x01 << (pin * 2))
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FATFS SDfs;
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FATFS SDfs;
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FIL file;
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FIL file;
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@ -1,83 +0,0 @@
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</launchConfiguration>
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