STM32F407VE adaptations, tried to find initialization bug
This commit is contained in:
parent
6d5b9578b9
commit
79d476e1eb
@ -131,7 +131,7 @@ g_pfnVectors:
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.word _estack
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.word _estack
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.word Reset_Handler
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.word Reset_Handler
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.word NMI_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word HardFault_PreHandler
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.word MemManage_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word UsageFault_Handler
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@ -240,8 +240,8 @@ g_pfnVectors:
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.weak NMI_Handler
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.weak HardFault_PreHandler
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.thumb_set HardFault_Handler,Default_Handler
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.thumb_set HardFault_PreHandler,Default_Handler
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.weak MemManage_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.thumb_set MemManage_Handler,Default_Handler
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@ -8,6 +8,8 @@
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#include "shimatta_sdio.h"
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#include "shimatta_sdio.h"
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#include "shimatta_sdio_config.h"
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#include "shimatta_sdio_config.h"
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#include <cmsis/core_cm4.h>
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#include <cmsis/core_cm4.h>
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#include <stm32f4xx.h>
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extern void SDIO_wait_ms(unsigned int i);
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#define SETAF(PORT,PIN,AF) PORT->AFR[(PIN < 8 ? 0 : 1)] |= AF << ((PIN < 8 ? PIN : (PIN - 8)) * 4)
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#define SETAF(PORT,PIN,AF) PORT->AFR[(PIN < 8 ? 0 : 1)] |= AF << ((PIN < 8 ? PIN : (PIN - 8)) * 4)
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@ -74,6 +76,7 @@ DSTATUS SDIO_status(){
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}
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}
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uint32_t debug;
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uint32_t debug;
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uint32_t debug_timeout;
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uint32_t debug_timeout;
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int debug_acmd = 0;
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DSTATUS SDIO_initialize(){
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DSTATUS SDIO_initialize(){
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int timeout = 0x3000;
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int timeout = 0x3000;
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int i;
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int i;
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@ -85,6 +88,7 @@ DSTATUS SDIO_initialize(){
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card_type_t detected_card = CARD_NONE;
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card_type_t detected_card = CARD_NONE;
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SDIO_init_hw();
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SDIO_init_hw();
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SDIO_wait_ms(2);
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SDIO_init_detect_pins();
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SDIO_init_detect_pins();
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if (checkNotInserted()) {
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if (checkNotInserted()) {
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return STA_NOINIT | STA_NODISK;
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return STA_NOINIT | STA_NODISK;
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@ -92,6 +96,7 @@ DSTATUS SDIO_initialize(){
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debug=0;
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debug=0;
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SDIO_send_go_idle_CMD0();
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SDIO_send_go_idle_CMD0();
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SDIO_wait_ms(2);
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res8 = SDIO_send_iface_condition_CMD8();
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res8 = SDIO_send_iface_condition_CMD8();
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switch (res8) {
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switch (res8) {
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case CMD8_VOLTAGE_ACCEPTED: // SDV2 Card
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case CMD8_VOLTAGE_ACCEPTED: // SDV2 Card
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@ -112,7 +117,9 @@ DSTATUS SDIO_initialize(){
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do {
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do {
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resa41 = SDIO_init_card_ACMD41(hcs_flag);
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resa41 = SDIO_init_card_ACMD41(hcs_flag);
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} while((resa41 == ACMD41_RESP_INIT) && (--timeout > 0));
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} while((resa41 == ACMD41_RESP_INIT) && (--timeout > 0));
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debug++;
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debug++;
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debug_acmd = resa41;
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debug_timeout= timeout;
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debug_timeout= timeout;
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switch (resa41) {
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switch (resa41) {
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case ACMD41_RESP_SDSC:
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case ACMD41_RESP_SDSC:
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@ -153,7 +160,7 @@ DSTATUS SDIO_initialize(){
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}
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}
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uint32_t debug_addr, debug_count;
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uint32_t debug_addr, debug_count;
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uint32_t __attribute__ ((aligned (16))) buffer_sdio[512/4];
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//uint32_t __attribute__ ((aligned (16))) buffer_sdio[512/4];
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DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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uint32_t addr;
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uint32_t addr;
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@ -166,14 +173,14 @@ DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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for (; count > 0; count--) {
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for (; count > 0; count--) {
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/* configure read DMA */
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/* configure read DMA */
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DMA2->LIFCR = 0xffffffff;
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// DMA2->LIFCR = 0xffffffff;
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DMA2->HIFCR = 0xffffffff;
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// DMA2->HIFCR = 0xffffffff;
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DMASTREAM->NDTR = 0;
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// DMASTREAM->NDTR = 0;
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DMASTREAM->FCR |= 0x21 | 0x3 | (1<<DMA_SxFCR_DMDIS);
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// DMASTREAM->FCR = DMA_SxFCR_FTH_0 | DMA_SxFCR_FTH_1 | DMA_SxFCR_DMDIS;
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DMASTREAM->M0AR = (uint32_t)(&buffer_sdio);
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// DMASTREAM->M0AR = (uint32_t)(buff);
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DMASTREAM->PAR = (uint32_t)&(SDIO->FIFO);
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// DMASTREAM->PAR = (uint32_t)&(SDIO->FIFO);
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DMASTREAM->CR = DMAP2M | DMA_SxCR_PL_1 | DMA_SxCR_PL_1;
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// DMASTREAM->CR = DMAP2M | DMA_SxCR_PL_1 | DMA_SxCR_PL_1;
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DMASTREAM->CR |= DMA_SxCR_EN;
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// DMASTREAM->CR |= DMA_SxCR_EN;
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SDIO->DLEN = (1 << BLOCKSIZE);
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SDIO->DLEN = (1 << BLOCKSIZE);
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@ -187,29 +194,29 @@ DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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SDIO->DCTRL = (BLOCKSIZE<<4) | SDIO_DCTRL_DTDIR | SDIO_DCTRL_DMAEN | SDIO_DCTRL_DTEN;
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SDIO->DCTRL = (BLOCKSIZE<<4) | SDIO_DCTRL_DTDIR | SDIO_DCTRL_DMAEN | SDIO_DCTRL_DTEN;
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debug=0;
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debug=0;
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// counter = 0;
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counter = 0;
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// while (counter < (1<<(BLOCKSIZE-2)) || !(SDIO->STA & (SDIO_STA_DBCKEND | SDIO_STA_DATAEND))) { // TODO: Handle errors
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while (counter < (1<<(BLOCKSIZE-2)) || !(SDIO->STA & (SDIO_STA_DBCKEND | SDIO_STA_DATAEND))) { // TODO: Handle errors
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// if (SDIO->STA & (SDIO_STA_DCRCFAIL | SDIO_STA_DTIMEOUT | SDIO_STA_STBITERR))
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if (SDIO->STA & (SDIO_STA_DCRCFAIL | SDIO_STA_DTIMEOUT | SDIO_STA_STBITERR))
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// {
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{
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// return RES_ERROR;
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return RES_ERROR;
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// }
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}
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//
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// if (SDIO->STA & SDIO_STA_RXDAVL) {
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// counter++;
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// fifo = SDIO->FIFO;
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// *(buff++) = (BYTE)(fifo & 0xFF);
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// fifo >>= 8;
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// *(buff++) = (BYTE)(fifo & 0xFF);
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// fifo >>= 8;
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// *(buff++) = (BYTE)(fifo & 0xFF);
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// fifo >>= 8;
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// *(buff++) = (BYTE)(fifo & 0xFF);
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// }
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//
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// }
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// if (SDIO->STA & SDIO_STA_DCRCFAIL) return RES_ERROR;
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while(DMASTREAM->CR & DMA_SxCR_EN);
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if (SDIO->STA & SDIO_STA_RXDAVL) {
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counter++;
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fifo = SDIO->FIFO;
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*(buff++) = (BYTE)(fifo & 0xFF);
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fifo >>= 8;
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*(buff++) = (BYTE)(fifo & 0xFF);
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fifo >>= 8;
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*(buff++) = (BYTE)(fifo & 0xFF);
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fifo >>= 8;
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*(buff++) = (BYTE)(fifo & 0xFF);
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}
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}
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if (SDIO->STA & SDIO_STA_DCRCFAIL) return RES_ERROR;
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//while(DMASTREAM->CR & DMA_SxCR_EN);
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while(1) {
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while(1) {
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__DSB();
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__DSB();
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__DMB();
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__DMB();
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@ -230,10 +237,6 @@ DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
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}
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}
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DMASTREAM->CR = 0x0;
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while (DMASTREAM->CR);
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__asm("dsb");
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if (card_info.type == SD_V2_HC) {
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if (card_info.type == SD_V2_HC) {
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addr++;
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addr++;
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} else {
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} else {
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@ -398,7 +401,7 @@ int SDIO_get_response(uint8_t expectedCMD, uint8_t typeOfAns, uint32_t *response
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return -CTIMEOUT;
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return -CTIMEOUT;
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}
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}
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//Valid Respone Received
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//Valid Respone Received
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if (((SDIO->RESPCMD & SDIO_RESPCMD_RESPCMD) != expectedCMD) && expectedCMD != 0xff)
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if (((SDIO->RESPCMD & SDIO_RESPCMD_RESPCMD) != expectedCMD) && (expectedCMD != 0xff))
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return -1; //Not the expected respose
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return -1; //Not the expected respose
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//If case of a correct Response
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//If case of a correct Response
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@ -438,7 +441,6 @@ ACMD41_RESP_t SDIO_init_card_ACMD41(uint8_t HCS){
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uint32_t response;
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uint32_t response;
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int retry = 0x20;
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int retry = 0x20;
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if (SDIO_switch_appmode_CMD55()) return ACMD41_RESP_ERR;
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if (SDIO_switch_appmode_CMD55()) return ACMD41_RESP_ERR;
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do {
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do {
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SDIO_send_cmd(41, (HCS ? (1<<30) : 0) | (1<<28) | (1<<20) |(1<<21)|(1<<22) |(1<<23)|(1<<19), SHORT_ANS);
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SDIO_send_cmd(41, (HCS ? (1<<30) : 0) | (1<<28) | (1<<20) |(1<<21)|(1<<22) |(1<<23)|(1<<19), SHORT_ANS);
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if (!SDIO_get_response(0xFF, SHORT_ANS, &response)) {
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if (!SDIO_get_response(0xFF, SHORT_ANS, &response)) {
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@ -12,13 +12,14 @@
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//4 bit: 4
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//4 bit: 4
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#define BUSWIDTH 4 //4
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#define BUSWIDTH 4 //4
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//Initial Transfer CLK (ca. 400kHz)
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//Initial Transfer CLK (ca. 400kHz)
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#define INITCLK 120 //120
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#define INITCLK 130 //120
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//Working CLK (Maximum)
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//Working CLK (Maximum)
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#define WORKCLK 255 //0
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#define WORKCLK 255 //0
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//Data Timeout in CLK Cycles
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//Data Timeout in CLK Cycles
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#define DTIMEOUT 0x3000 //150
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#define DTIMEOUT 0x3000 //150
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//DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
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//DMA Stream used for TX and RX DMA2 Stream 3 or 6 possible
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#define DMASTREAM DMA2_Stream6
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// Currently not used due to possible misalignment of the data buffer.
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//#define DMASTREAM DMA2_Stream6
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/* Port Definitions */
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/* Port Definitions */
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20
hardfault/hardfault_prehandler.S
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20
hardfault/hardfault_prehandler.S
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@ -0,0 +1,20 @@
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/* Preliminary Header: Author: Mario Huettel */
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.syntax unified
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.cpu cortex-m4
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.thumb
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.type HardFault_PreHandler, %function
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.global HardFault_PreHandler
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.type HardFault_PreHandler, %function
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HardFault_PreHandler:
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TST LR, #4 // Test bit 2. If active => PSP was used, else MSP
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ITE EQ
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MRSEQ R0, MSP // Bit not set => MSP as argument
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MRSNE R0, PSP // Bit set => PSP
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LDR R1, =HardFault_Handler
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BX R1
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//.weak HardFault_Handler
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//.thumb_set HardFault_Handler, HardFault_Handler_Default
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//HardFault_Handler_Default:
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//B HardFault_Handler_Default
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@ -98,7 +98,7 @@
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*/
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*/
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#define _USE_LFN 0
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#define _USE_LFN 1
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#define _MAX_LFN 255
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#define _MAX_LFN 255
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/* The _USE_LFN switches the support of long file name (LFN).
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/* The _USE_LFN switches the support of long file name (LFN).
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/
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/
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54
main.c
54
main.c
@ -10,6 +10,7 @@
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#include <fatfs/diskio.h>
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#include <fatfs/diskio.h>
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#include <uart/uart.h>
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#include <uart/uart.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <stdint.h>
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#define OUTPUT(pin) (0b01 << (pin * 2))
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#define OUTPUT(pin) (0b01 << (pin * 2))
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@ -17,24 +18,24 @@ FATFS SDfs;
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FIL file;
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FIL file;
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DIR root;
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DIR root;
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volatile int w;
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volatile int w;
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volatile uint32_t sdio_wait;
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DSTATUS SDIO_initialize();
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int initreq = 0xFF;
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int initreq = 0xFF;
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int main() {
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int main() {
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char buff[100];
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char buff[1024];
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char *name;
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char *name;
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FILINFO fno;
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FILINFO fno;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
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__DSB();
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__DSB();
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GPIOD->MODER |= OUTPUT(12) | OUTPUT(13);
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GPIOA->MODER |= OUTPUT(6) | OUTPUT(7);
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GPIOA->ODR |= (1<<7);
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SysTick_Config(8*1680000);
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SysTick_Config(8*1680000);
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// f_mount(&SDfs, "0:/", 1);
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// f_mount(&SDfs, "0:/", 1);
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w = 0;
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w = 0;
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initUART();
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initUART();
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setvbuf(stdout, NULL, _IONBF, 0);
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setvbuf(stdout, NULL, _IONBF, 0);
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while(w<10);
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//while(w<10);
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initreq = f_mount(&SDfs, "0:/", 1);
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initreq = f_mount(&SDfs, "0:/", 1);
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while(initreq);
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while(initreq);
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@ -43,16 +44,16 @@ int main() {
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if (!f_readdir(&root, &fno))
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if (!f_readdir(&root, &fno))
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{
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{
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name = fno.fname;
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name = fno.fname;
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initreq = f_open(&file, _T("test.txt"), FA_READ);
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initreq = f_open(&file, name, FA_READ);
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if (initreq == FR_OK) {
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if (initreq == FR_OK) {
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f_gets(buff, sizeof(buff), &file);
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f_gets(buff, sizeof(buff), &file);
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printf("test.txt:\r\n%s\r\n", buff);
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printf("%s:\r\n%s\r\n",name, buff);
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f_close(&file);
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f_close(&file);
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}
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}
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}
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}
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}
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}
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fflush(stdout);
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//fflush(stdout);
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while(1);
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while(1);
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@ -60,8 +61,41 @@ while(1);
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}
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}
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void HardFault_Handler(uint32_t *stack) {
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// unsigned int stacked_r0;
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// unsigned int stacked_r1;
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// unsigned int stacked_r2;
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// unsigned int stacked_r3;
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// unsigned int stacked_r12;
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// unsigned int stacked_lr;
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// unsigned int stacked_pc;
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// unsigned int stacked_psr;
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//
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// stacked_r0 = stack[0];
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// stacked_r1 = stack[1];
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// stacked_r2 = stack[2];
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// stacked_r3 = stack[3];
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//
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// stacked_r12 = stack[4];
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// stacked_lr = stack[5];
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// stacked_pc = stack[6];
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// stacked_psr = stack[7];
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GPIOA->MODER |= OUTPUT(6) | OUTPUT(7);
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GPIOA->ODR |= (1<<6) | (1<<7);
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while(1);
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}
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void SysTick_Handler()
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void SysTick_Handler()
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{
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{
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GPIOD->ODR ^= (1<<12);
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GPIOA->ODR ^= (1<<6)|(1<<7);
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w++;
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w++;
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sdio_wait++;
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}
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void SDIO_wait_ms(unsigned int i) {
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sdio_wait = 0;
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while(sdio_wait<i);
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}
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}
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@ -37,7 +37,7 @@ _estack = 0x20020000; /* end of 128K RAM on AHB bus*/
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||||||
/* Generate a link error if heap and stack don't fit into RAM */
|
/* Generate a link error if heap and stack don't fit into RAM */
|
||||||
_Min_Heap_Size = 0X0000; /* required amount of heap (DEFAULT 0) */
|
_Min_Heap_Size = 0X0000; /* required amount of heap (DEFAULT 0) */
|
||||||
_Min_Stack_Size = 0x400 ; /* required amount of stack */
|
_Min_Stack_Size = 0x1000 ; /* required amount of stack */
|
||||||
/* recommended min stack size for printf=0x2000, orig = 0x400 */
|
/* recommended min stack size for printf=0x2000, orig = 0x400 */
|
||||||
|
|
||||||
/* Specify the memory areas */
|
/* Specify the memory areas */
|
||||||
|
@ -25,7 +25,7 @@
|
|||||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
|
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
|
||||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="jtag"/>
|
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="jtag"/>
|
||||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
|
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
|
||||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="STM32F407VG"/>
|
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="STM32F407VE"/>
|
||||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="1000"/>
|
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="1000"/>
|
||||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="JLinkGDBServer"/>
|
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="JLinkGDBServer"/>
|
||||||
<intAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
|
<intAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
|
||||||
@ -79,5 +79,5 @@
|
|||||||
</listAttribute>
|
</listAttribute>
|
||||||
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"> <memoryBlockExpression address="536872736" label="0x20000720"/> </memoryBlockExpressionList> "/>
|
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"> <memoryBlockExpression address="536872736" label="0x20000720"/> </memoryBlockExpressionList> "/>
|
||||||
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
|
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
|
||||||
<stringAttribute key="saved_expressions<seperator>Unknown" value="0x20000720,0x20000920,0x20000c98,0x20000e98,0x20000ec98,buffer_sdio"/>
|
<stringAttribute key="saved_expressions<seperator>Unknown" value="0x20000720,0x20000920,0x20000c98,0x20000e98,0x20000ec98,buffer_sdio,buff_sdio,sdio_buff"/>
|
||||||
</launchConfiguration>
|
</launchConfiguration>
|
||||||
|
Loading…
Reference in New Issue
Block a user