Added security Pullups
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@ -67,7 +67,7 @@ void SDIO_DMA_Init(){
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DMASTREAM->CR = DMAM2P;
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DMASTREAM->CR = DMAM2P;
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//Address Conffiguration
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//Address Conffiguration
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//Memory address is set by write and read block functions
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//Memory address is set by write and read block functions
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//DMASTREAM->M0AR = (uint32_t)&rxtxbuffer; //Has to be set in red/write func
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//DMASTREAM->M0AR = (uint32_t)&rxtxbuffer; //Has to be set in read/write func
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DMASTREAM->PAR = (uint32_t)&SDIO->FIFO; //Not sure if this works
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DMASTREAM->PAR = (uint32_t)&SDIO->FIFO; //Not sure if this works
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//DMASTREAM->CR |= DMA_SxCR_EN;
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//DMASTREAM->CR |= DMA_SxCR_EN;
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@ -80,10 +80,14 @@ void SDIO_InitModule(){
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//Init Alternate Functions
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//Init Alternate Functions
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CLKPORT->MODER |= (2<<CLKPIN*2);
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CLKPORT->MODER |= (2<<CLKPIN*2);
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D0PORT->MODER |= (2<<D0PIN*2);
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D0PORT->MODER |= (2<<D0PIN*2);
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D0PORT->PUPDR |= (1<<D0PIN*2);
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#if BUSWIDTH==1
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#if BUSWIDTH==1
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D1PORT->MODER |= (2<<D1PIN*2);
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D1PORT->MODER |= (2<<D1PIN*2);
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D1PORT->PUPDR |= (1<<D1PIN*2);
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D2PORT->MODER |= (2<<D2PIN*2);
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D2PORT->MODER |= (2<<D2PIN*2);
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D2PORT->PUPDR |= (1<<D2PIN*2);
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D3PORT->MODER |= (2<<D3PIN*2);
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D3PORT->MODER |= (2<<D3PIN*2);
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D3PORT->PUPDR |= (1<<D3PIN*2);
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#endif
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#endif
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//CLKPORT->AFR[(CLKPIN < 8 ? 0 : 1)] |= ALTFUNC << ((CLKPIN < 8 ? CLKPIN : (CLKPIN - 8)) * 4);
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//CLKPORT->AFR[(CLKPIN < 8 ? 0 : 1)] |= ALTFUNC << ((CLKPIN < 8 ? CLKPIN : (CLKPIN - 8)) * 4);
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SETAF(CLKPORT, CLKPIN, ALTFUNC);
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SETAF(CLKPORT, CLKPIN, ALTFUNC);
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@ -93,6 +97,8 @@ void SDIO_InitModule(){
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SETAF(D2PORT, D2PIN, ALTFUNC);
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SETAF(D2PORT, D2PIN, ALTFUNC);
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SETAF(D3PORT, D3PIN, ALTFUNC);
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SETAF(D3PORT, D3PIN, ALTFUNC);
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#endif
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#endif
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//Init Module
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//Init Module
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//Set CLK Control Register
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//Set CLK Control Register
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@ -177,7 +183,7 @@ int SDIO_send_CMD55(){
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}
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}
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int SDIO_send_ACMD41(){
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int SDIO_send_ACMD41(){
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int retry = 0x200;
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int retry = 0x20;
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if (SDIO_send_CMD55()) return -1;
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if (SDIO_send_CMD55()) return -1;
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do {
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do {
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