This commit is contained in:
Mario Hüttel 2020-01-19 20:10:26 +01:00
parent c4166fef74
commit caf5456067
3 changed files with 68 additions and 2 deletions

7
.gitignore vendored
View File

@ -7,3 +7,10 @@ Debug
*.user.*
*.lss
*.d
sdio.cflags
sdio.config
sdio.creator
sdio.cxxflags
sdio.files
sdio.includes

View File

@ -78,6 +78,62 @@ DSTATUS SDIO_status(){
volatile uint32_t debug;
volatile uint32_t debug_timeout;
volatile int debug_acmd = 0;
sdio_write_buffer(uint32_t dlen, uint32_t blklen, uint8_t *buff)
{
int count;
int byte_count;
int byte_max;
uint32_t fifo;
SDIO->DLEN = dlen;
/* Init Transfer */
SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC |
SDIO_ICR_STBITERRC | SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | SDIO_ICR_CEATAENDC;
SDIO->DCTRL = (blklen<<4) | SDIO_DCTRL_DTEN;
for (count = 0; count < dlen; count += 4) {
fifo = 0;
if ((dlen - count) < 4)
byte_max = dlen - count;
else
byte_max = 4;
for (byte_count = 0; byte_count < byte_max; byte_count++)
{
fifo >>= 8;
fifo |= (((uint32_t)*(buff++)) << 24) & 0xFF000000;
}
while (SDIO->STA & SDIO_STA_TXFIFOF);
SDIO->FIFO = fifo;
}
while (SDIO->STA & SDIO_STA_TXACT);
}
uint8_t data1[512] = {(1<<1), 16, 0xC9, 0x9A, 0x20, 0x84, 0x3E, 0xD7, 0xD9, 0x0B, 0x68, 0x01,
0xE4, 0x9F, 0x2B, 0xC8, 0x02, 0x77};
sdio_unlock_card()
{
uint32_t resp[10];
//SDIO_send_block_length_CMD16(18U);
SDIO_send_cmd(42, 0, SHORT_ANS);
SDIO_get_response(42, SHORT_ANS, resp);
sdio_write_buffer(512, 9, data1);
}
DSTATUS SDIO_initialize(){
int timeout = 0x3000;
int i;
@ -148,6 +204,9 @@ DSTATUS SDIO_initialize(){
if (SDIO_send_block_length_CMD16((uint32_t)(1<<BLOCKSIZE)))
return STA_NOINIT;
sdio_unlock_card();
if (SDIO_send_bus_width_ACMD6(BUSWIDTH))
return STA_NOINIT;
@ -193,7 +252,7 @@ DRESULT SDIO_disk_read(BYTE *buff, DWORD sector, UINT count){
SDIO->ICR = SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC |
SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | SDIO_ICR_DATAENDC |
SDIO_ICR_STBITERRC | SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | SDIO_ICR_CEATAENDC;
SDIO->DCTRL = (BLOCKSIZE<<4) | SDIO_DCTRL_DTDIR | SDIO_DCTRL_DMAEN | SDIO_DCTRL_DTEN;
SDIO->DCTRL = (BLOCKSIZE<<4) | SDIO_DCTRL_DTDIR | /*SDIO_DCTRL_DMAEN |*/ SDIO_DCTRL_DTEN;
debug=0;
counter = 0;

View File

@ -10,7 +10,7 @@
#define HW_FLOW 0 //0
//1 bit: !=4
//4 bit: 4
#define BUSWIDTH 4 //4
#define BUSWIDTH 1 //4
//Initial Transfer CLK (ca. 400kHz)
#define INITCLK 130 //120
//Working CLK (Maximum)