Fix errors in LD Script, write init code. Tested!
This commit is contained in:
parent
ced5054c25
commit
9f8a51da6a
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@ -0,0 +1,7 @@
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project.elf
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*.o
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*.map
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*.user
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*.user*
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*.user.*
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@ -0,0 +1,86 @@
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################################Shimatta Makefile####################################
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#CPU: STM32F746ZGT
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#Compiler: arm-none-eabi
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#####################################################################################
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#Add Files and Folders below#########################################################
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CFILES = main.c syscalls/syscalls.c setup/system_init.c startup/startup_stm32f746.c
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ASFILES =
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INCLUDEPATH = -Iinclude
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target = project
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LIBRARYPATH = -Lstartup -Ldsp
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LIBRARIES = -larm_cortexM7lfsp_math
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DEFINES = -DSTM32F746xx -DSTM32F7XX -DARM_MATH_CM7
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mapfile = memmap
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##Custom Files###
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#TODO
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###################################################################################
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CC=arm-none-eabi-gcc
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OBJCOPY=arm-none-eabi-objcopy
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OBJDUMP=arm-none-eabi-objdump
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SIZE=arm-none-eabi-size
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LFLAGS = -mlittle-endian -mthumb -mcpu=cortex-m7 -mthumb-interwork
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LFLAGS += -mfloat-abi=hard -mfpu=fpv5-sp-d16 --disable-newlib-supplied-syscalls -nostartfiles
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LFLAGS += -Tstm32f746zgt-axim.ld -Wl,-Map=$(mapfile).map -Wl,--gc-sections
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CFLAGS = -c -fmessage-length=0 -mlittle-endian -mthumb -mcpu=cortex-m7 -mthumb-interwork
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CFLAGS += -mfloat-abi=hard -mfpu=fpv5-sp-d16 -nostartfiles -Wall
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####################################################################################
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OBJ = $(CFILES:%.c=%.c.o)
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ASOBJ = $(ASFILES:%.S=%.S.o)
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default: $(target).elf
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%.bin: %.elf
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$(OBJCOPY) -O binary $^ $@
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%.hex: %.elf
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$(OBJCOPY) -O ihex $^ $@
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#Linking
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$(target).elf: $(OBJ) $(ASOBJ)
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$(CC) $(LFLAGS) $(LIBRARYPATH) -o $@ $^ $(LIBRARIES)
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$(SIZE) $@
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#Compiling
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%.c.o: %.c
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$(CC) $(CFLAGS) $(INCLUDEPATH) $(DEFINES) -o $@ $<
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%.S.o: %.S
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$(CC) $(CFLAGS) $(INCLUDEPATH) $(DEFINES) -o $@ $<
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.PHONY: qtproject clean mrproper objcopy disassemble
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disassemble: $(target).elf
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$(OBJDUMP) -D -s $< > $(target).lss
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objcopy: $(target).bin $(target).hex
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mrproper:
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rm -f $(target).pro
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clean:
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rm -f $(target).elf $(target).bin $(target).hex $(OBJ) $(ASOBJ) $(mapfile).map $(target).lss
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qtproject:
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echo -e "TEMPLATE = app\nCONFIG -= console app_bundle qt" > $(target).pro
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echo -e "SOURCES += $(CFILES) $(ASFILES)" >> $(target).pro
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echo -ne "INCLUDEPATH += " >> $(target).pro
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echo "$(INCLUDEPATH)" | sed "s!-I!./!g" >> $(target).pro
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echo -ne "HEADERS += " >> $(target).pro
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find -name "*.h" | tr "\\n" " " >> $(target).pro
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echo -ne "\nDEFINES += " >> $(target).pro
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echo "$(DEFINES)" | sed "s/-D//g" >> $(target).pro
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@ -0,0 +1,87 @@
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/**************************************************************************//**
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* @file core_cmFunc.h
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* @brief CMSIS Cortex-M Core Function Access Header File
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* @version V4.30
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* @date 20. October 2015
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******************************************************************************/
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/* Copyright (c) 2009 - 2015 ARM LIMITED
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
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||||
*
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||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
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||||
---------------------------------------------------------------------------*/
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#if defined ( __ICCARM__ )
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#pragma system_include /* treat file as system include file for MISRA check */
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang system_header /* treat file as system include file */
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#endif
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#ifndef __CORE_CMFUNC_H
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#define __CORE_CMFUNC_H
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/* ########################### Core Function Access ########################### */
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/** \ingroup CMSIS_Core_FunctionInterface
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\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
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@{
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*/
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/*------------------ RealView Compiler -----------------*/
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#if defined ( __CC_ARM )
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#include "cmsis_armcc.h"
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/*------------------ ARM Compiler V6 -------------------*/
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#include "cmsis_armcc_V6.h"
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/*------------------ GNU Compiler ----------------------*/
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#elif defined ( __GNUC__ )
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#include "cmsis_gcc.h"
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/*------------------ ICC Compiler ----------------------*/
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#elif defined ( __ICCARM__ )
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#include <cmsis_iar.h>
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/*------------------ TI CCS Compiler -------------------*/
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#elif defined ( __TMS470__ )
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#include <cmsis_ccs.h>
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/*------------------ TASKING Compiler ------------------*/
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#elif defined ( __TASKING__ )
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/*
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* The CMSIS functions have been implemented as intrinsics in the compiler.
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* Please use "carm -?i" to get an up to date list of all intrinsics,
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* Including the CMSIS ones.
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*/
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/*------------------ COSMIC Compiler -------------------*/
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#elif defined ( __CSMC__ )
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#include <cmsis_csm.h>
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#endif
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/*@} end of CMSIS_Core_RegAccFunctions */
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#endif /* __CORE_CMFUNC_H */
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@ -0,0 +1,87 @@
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/**************************************************************************//**
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* @file core_cmInstr.h
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* @brief CMSIS Cortex-M Core Instruction Access Header File
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* @version V4.30
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* @date 20. October 2015
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******************************************************************************/
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/* Copyright (c) 2009 - 2015 ARM LIMITED
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All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
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||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
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#if defined ( __ICCARM__ )
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#pragma system_include /* treat file as system include file for MISRA check */
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang system_header /* treat file as system include file */
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#endif
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#ifndef __CORE_CMINSTR_H
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#define __CORE_CMINSTR_H
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/* ########################## Core Instruction Access ######################### */
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/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
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Access to dedicated instructions
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@{
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*/
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/*------------------ RealView Compiler -----------------*/
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#if defined ( __CC_ARM )
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#include "cmsis_armcc.h"
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/*------------------ ARM Compiler V6 -------------------*/
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#include "cmsis_armcc_V6.h"
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/*------------------ GNU Compiler ----------------------*/
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#elif defined ( __GNUC__ )
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#include "cmsis_gcc.h"
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/*------------------ ICC Compiler ----------------------*/
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#elif defined ( __ICCARM__ )
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#include <cmsis_iar.h>
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/*------------------ TI CCS Compiler -------------------*/
|
||||
#elif defined ( __TMS470__ )
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#include <cmsis_ccs.h>
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|
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/*------------------ TASKING Compiler ------------------*/
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||||
#elif defined ( __TASKING__ )
|
||||
/*
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||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
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||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
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* Including the CMSIS ones.
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||||
*/
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|
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/*------------------ COSMIC Compiler -------------------*/
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#elif defined ( __CSMC__ )
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#include <cmsis_csm.h>
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#endif
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/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
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#endif /* __CORE_CMINSTR_H */
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@ -0,0 +1,96 @@
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/**************************************************************************//**
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||||
* @file core_cmSimd.h
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* @brief CMSIS Cortex-M SIMD Header File
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||||
* @version V4.30
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* @date 20. October 2015
|
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******************************************************************************/
|
||||
/* Copyright (c) 2009 - 2015 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_CMSIMD_H
|
||||
#define __CORE_CMSIMD_H
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||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* ################### Compiler specific Intrinsics ########################### */
|
||||
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
||||
Access to dedicated SIMD instructions
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||||
@{
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||||
*/
|
||||
|
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/*------------------ RealView Compiler -----------------*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
/*------------------ ARM Compiler V6 -------------------*/
|
||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armcc_V6.h"
|
||||
|
||||
/*------------------ GNU Compiler ----------------------*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
/*------------------ ICC Compiler ----------------------*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iar.h>
|
||||
|
||||
/*------------------ TI CCS Compiler -------------------*/
|
||||
#elif defined ( __TMS470__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
/*------------------ TASKING Compiler ------------------*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
/*------------------ COSMIC Compiler -------------------*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#endif
|
||||
|
||||
/*@} end of group CMSIS_SIMD_intrinsics */
|
||||
|
||||
|
||||
#ifdef __cplusplus
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||||
}
|
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#endif
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||||
|
||||
#endif /* __CORE_CMSIMD_H */
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/**
|
||||
******************************************************************************
|
||||
* @file stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 30-December-2016
|
||||
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
* is using in the C source code, usually in main.c. This file contains:
|
||||
* - Configuration section that allows to select:
|
||||
* - The STM32F7xx device used in the target application
|
||||
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||
* code will be based on direct access to peripheral’s registers
|
||||
* rather than drivers API), this option is controlled by
|
||||
* "#define USE_HAL_DRIVER"
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f7xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef __STM32F7xx_H
|
||||
#define __STM32F7xx_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief STM32 Family
|
||||
*/
|
||||
#if !defined (STM32F7)
|
||||
#define STM32F7
|
||||
#endif /* STM32F7 */
|
||||
|
||||
/* Uncomment the line below according to the target STM32 device used in your
|
||||
application
|
||||
*/
|
||||
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
|
||||
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
|
||||
/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
|
||||
STM32F756NG Devices */
|
||||
/* #define STM32F746xx */ /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
|
||||
STM32F746BE, STM32F746BG, STM32F746NE, STM32F746NG Devices */
|
||||
/* #define STM32F745xx */ /*!< STM32F745VE, STM32F745VG, STM32F745ZG, STM32F745ZE, STM32F745IE, STM32F745IG Devices */
|
||||
/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
|
||||
STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
|
||||
/* #define STM32F767xx */ /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
|
||||
/* #define STM32F769xx */ /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
|
||||
STM32F769NG, STM32F769NI, STM32F768AI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
|
||||
/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
|
||||
STM32F722VC, STM32F722RC Devices */
|
||||
/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
|
||||
/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
|
||||
/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
*/
|
||||
|
||||
#if !defined (USE_HAL_DRIVER)
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
In this case, these drivers will not be included and the application code will
|
||||
be based on direct access to peripherals registers
|
||||
*/
|
||||
/*#define USE_HAL_DRIVER */
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.2.0
|
||||
*/
|
||||
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|
||||
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
|
||||
|(__STM32F7_CMSIS_VERSION_SUB2 << 8 )\
|
||||
|(__STM32F7_CMSIS_VERSION))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F722xx)
|
||||
#include "stm32f722xx.h"
|
||||
#elif defined(STM32F723xx)
|
||||
#include "stm32f723xx.h"
|
||||
#elif defined(STM32F732xx)
|
||||
#include "stm32f732xx.h"
|
||||
#elif defined(STM32F733xx)
|
||||
#include "stm32f733xx.h"
|
||||
#elif defined(STM32F756xx)
|
||||
#include "stm32f756xx.h"
|
||||
#elif defined(STM32F746xx)
|
||||
#include "stm32f746xx.h"
|
||||
#elif defined(STM32F745xx)
|
||||
#include "stm32f745xx.h"
|
||||
#elif defined(STM32F765xx)
|
||||
#include "stm32f765xx.h"
|
||||
#elif defined(STM32F767xx)
|
||||
#include "stm32f767xx.h"
|
||||
#elif defined(STM32F769xx)
|
||||
#include "stm32f769xx.h"
|
||||
#elif defined(STM32F777xx)
|
||||
#include "stm32f777xx.h"
|
||||
#elif defined(STM32F779xx)
|
||||
#include "stm32f779xx.h"
|
||||
#else
|
||||
#error "Please select first the target STM32F7xx device used in your application (in stm32f7xx.h file)"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ERROR = 0,
|
||||
SUCCESS = !ERROR
|
||||
} ErrorStatus;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_macro
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* __STM32F7xx_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#include <stm32f7xx.h>
|
||||
|
||||
unsigned int i = 0x12345678;
|
||||
unsigned char c = 2;
|
||||
|
||||
int main(void) {
|
||||
while(1) {
|
||||
i++;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
#include <stm32f7xx.h>
|
||||
|
||||
|
||||
#define VECT_TAB_OFFSET (0x0)
|
||||
|
||||
|
||||
|
||||
void __system_init(void) {
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000001;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00000000;
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x24003010;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIR = 0x00000000;
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,346 @@
|
|||
/*
|
||||
* STM32F746ZG Startup Code for STM32F746 devices
|
||||
* Copyright (C) 2017 Mario Hüttel <mario.huettel@gmx.net>
|
||||
*
|
||||
* This file is part of 'STM32F7 code template'.
|
||||
*
|
||||
* It is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, version 2 of the License.
|
||||
*
|
||||
* This code is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this template. If not, see <http://www.gnu.org/licenses/>.
|
||||
* ------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* C++ library init */
|
||||
# if defined(__cplusplus)
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Defines for weak default handlers */
|
||||
#define WEAK __attribute__((weak))
|
||||
#define ALIAS(func) __attribute__ ((weak, alias (#func)))
|
||||
|
||||
/* Define for section mapping */
|
||||
#define SECTION(sec) __attribute__((section(sec)))
|
||||
|
||||
/* Handler prototypes */
|
||||
#if defined(_cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* Interrupt Defualt handler */
|
||||
WEAK void __int_default_handler(void);
|
||||
|
||||
|
||||
/* Core Interrupts */
|
||||
void Reset_Handler(void);
|
||||
void NMI_Handler(void) ALIAS(__int_default_handler);
|
||||
void HardFault_Handler(void) ALIAS(__int_default_handler);
|
||||
void MemManage_Handler(void) ALIAS(__int_default_handler);
|
||||
void BusFault_Handler(void) ALIAS(__int_default_handler);
|
||||
void UsageFault_Handler(void) ALIAS(__int_default_handler);
|
||||
void SVC_Handler(void) ALIAS(__int_default_handler);
|
||||
void DebugMon_Handler(void) ALIAS(__int_default_handler);
|
||||
void PendSV_Handler(void) ALIAS(__int_default_handler);
|
||||
void SysTick_Handler(void) ALIAS(__int_default_handler);
|
||||
|
||||
/* Peripheral Interrupts (by default mapped onto Default Handler) */
|
||||
void WWDG_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void PVD_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TAMP_STAMP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void RTC_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void FLASH_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void RCC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream6_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void ADC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_TX_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_RX0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_RX1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN1_SCE_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI9_5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_BRK_TIM9_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_UP_TIM10_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_TRG_COM_TIM11_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM1_CC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C1_EV_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C1_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C2_EV_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C2_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void EXTI15_10_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void RTC_Alarm_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_FS_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_BRK_TIM12_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_UP_TIM13_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_TRG_COM_TIM14_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM8_CC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA1_Stream7_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void FMC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SDMMC1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void UART4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void UART5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM6_DAC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void TIM7_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream3_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void ETH_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void ETH_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_TX_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_RX0_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_RX1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CAN2_SCE_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_FS_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream6_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2_Stream7_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void USART6_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C3_EV_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C3_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_EP1_OUT_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_EP1_IN_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_WKUP_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void OTG_HS_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DCMI_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void RNG_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void FPU_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void UART7_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void UART8_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI4_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI5_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPI6_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SAI1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void LTDC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void LTDC_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void DMA2D_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SAI2_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void QUADSPI_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void LPTIM1_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void CEC_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C4_EV_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void I2C4_ER_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
void SPDIF_RX_IRQHandler(void) ALIAS(__int_default_handler);
|
||||
|
||||
extern int main(void);
|
||||
extern void __system_init(void);
|
||||
|
||||
extern void __ld_top_of_stack(void);
|
||||
#if defined(_cplusplus)
|
||||
extern "C" }
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
void (* const vector_table[])(void) SECTION(".vectors") = {
|
||||
&__ld_top_of_stack,
|
||||
/* Core Interrupts */
|
||||
Reset_Handler,
|
||||
NMI_Handler,
|
||||
HardFault_Handler,
|
||||
MemManage_Handler,
|
||||
BusFault_Handler,
|
||||
UsageFault_Handler,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
SVC_Handler,
|
||||
DebugMon_Handler,
|
||||
0,
|
||||
PendSV_Handler,
|
||||
SysTick_Handler,
|
||||
/* Peripheral Interrupts */
|
||||
WWDG_IRQHandler,
|
||||
PVD_IRQHandler,
|
||||
TAMP_STAMP_IRQHandler,
|
||||
RTC_WKUP_IRQHandler,
|
||||
FLASH_IRQHandler,
|
||||
RCC_IRQHandler,
|
||||
EXTI0_IRQHandler,
|
||||
EXTI1_IRQHandler,
|
||||
EXTI2_IRQHandler,
|
||||
EXTI3_IRQHandler,
|
||||
EXTI4_IRQHandler,
|
||||
DMA1_Stream0_IRQHandler,
|
||||
DMA1_Stream1_IRQHandler,
|
||||
DMA1_Stream2_IRQHandler,
|
||||
DMA1_Stream3_IRQHandler,
|
||||
DMA1_Stream4_IRQHandler,
|
||||
DMA1_Stream5_IRQHandler,
|
||||
DMA1_Stream6_IRQHandler,
|
||||
ADC_IRQHandler,
|
||||
CAN1_TX_IRQHandler,
|
||||
CAN1_RX0_IRQHandler,
|
||||
CAN1_RX1_IRQHandler,
|
||||
CAN1_SCE_IRQHandler,
|
||||
EXTI9_5_IRQHandler,
|
||||
TIM1_BRK_TIM9_IRQHandler,
|
||||
TIM1_UP_TIM10_IRQHandler,
|
||||
TIM1_TRG_COM_TIM11_IRQHandler,
|
||||
TIM1_CC_IRQHandler,
|
||||
TIM2_IRQHandler,
|
||||
TIM3_IRQHandler,
|
||||
TIM4_IRQHandler,
|
||||
I2C1_EV_IRQHandler,
|
||||
I2C1_ER_IRQHandler,
|
||||
I2C2_EV_IRQHandler,
|
||||
I2C2_ER_IRQHandler,
|
||||
SPI1_IRQHandler,
|
||||
SPI2_IRQHandler,
|
||||
USART1_IRQHandler,
|
||||
USART2_IRQHandler,
|
||||
USART3_IRQHandler,
|
||||
EXTI15_10_IRQHandler,
|
||||
RTC_Alarm_IRQHandler,
|
||||
OTG_FS_WKUP_IRQHandler,
|
||||
TIM8_BRK_TIM12_IRQHandler,
|
||||
TIM8_UP_TIM13_IRQHandler,
|
||||
TIM8_TRG_COM_TIM14_IRQHandler,
|
||||
TIM8_CC_IRQHandler,
|
||||
DMA1_Stream7_IRQHandler,
|
||||
FMC_IRQHandler,
|
||||
SDMMC1_IRQHandler,
|
||||
TIM5_IRQHandler,
|
||||
SPI3_IRQHandler,
|
||||
UART4_IRQHandler,
|
||||
UART5_IRQHandler,
|
||||
TIM6_DAC_IRQHandler,
|
||||
TIM7_IRQHandler,
|
||||
DMA2_Stream0_IRQHandler,
|
||||
DMA2_Stream1_IRQHandler,
|
||||
DMA2_Stream2_IRQHandler,
|
||||
DMA2_Stream3_IRQHandler,
|
||||
DMA2_Stream4_IRQHandler,
|
||||
ETH_IRQHandler,
|
||||
ETH_WKUP_IRQHandler,
|
||||
CAN2_TX_IRQHandler,
|
||||
CAN2_RX0_IRQHandler,
|
||||
CAN2_RX1_IRQHandler,
|
||||
CAN2_SCE_IRQHandler,
|
||||
OTG_FS_IRQHandler,
|
||||
DMA2_Stream5_IRQHandler,
|
||||
DMA2_Stream6_IRQHandler,
|
||||
DMA2_Stream7_IRQHandler,
|
||||
USART6_IRQHandler,
|
||||
I2C3_EV_IRQHandler,
|
||||
I2C3_ER_IRQHandler,
|
||||
OTG_HS_EP1_OUT_IRQHandler,
|
||||
OTG_HS_EP1_IN_IRQHandler,
|
||||
OTG_HS_WKUP_IRQHandler,
|
||||
OTG_HS_IRQHandler,
|
||||
DCMI_IRQHandler,
|
||||
0,
|
||||
RNG_IRQHandler,
|
||||
FPU_IRQHandler,
|
||||
UART7_IRQHandler,
|
||||
UART8_IRQHandler,
|
||||
SPI4_IRQHandler,
|
||||
SPI5_IRQHandler,
|
||||
SPI6_IRQHandler,
|
||||
SAI1_IRQHandler,
|
||||
LTDC_IRQHandler,
|
||||
LTDC_ER_IRQHandler,
|
||||
DMA2D_IRQHandler,
|
||||
SAI2_IRQHandler,
|
||||
QUADSPI_IRQHandler,
|
||||
LPTIM1_IRQHandler,
|
||||
CEC_IRQHandler,
|
||||
I2C4_EV_IRQHandler,
|
||||
I2C4_ER_IRQHandler,
|
||||
SPDIF_RX_IRQHandler,
|
||||
};
|
||||
|
||||
static void __init_section(unsigned int *src_start, unsigned int *dest_start, unsigned int *dest_end) {
|
||||
unsigned int *get, *put;
|
||||
|
||||
put = dest_start;
|
||||
get = src_start;
|
||||
|
||||
while ((unsigned int)put < (unsigned int)dest_end) {
|
||||
*(put++) = *(get++);
|
||||
}
|
||||
}
|
||||
|
||||
static void __fill_zero(unsigned int *start, unsigned int *end) {
|
||||
while ((unsigned int) start < (unsigned int)end) {
|
||||
*(start++) = 0x00000000;
|
||||
}
|
||||
}
|
||||
|
||||
extern unsigned int __ld_load_itcm;
|
||||
extern unsigned int __ld_load_dtcm;
|
||||
extern unsigned int __ld_load_data;
|
||||
extern unsigned int __ld_sitcm;
|
||||
extern unsigned int __ld_eitcm;
|
||||
extern unsigned int __ld_sdtcm;
|
||||
extern unsigned int __ld_edtcm;
|
||||
extern unsigned int __ld_sdata;
|
||||
extern unsigned int __ld_edata;
|
||||
extern unsigned int __ld_sbss;
|
||||
extern unsigned int __ld_ebss;
|
||||
extern unsigned int __ld_sheap;
|
||||
extern unsigned int __ld_eheap;
|
||||
|
||||
void Reset_Handler(void) {
|
||||
/* Stack is already initilized by hardware */
|
||||
|
||||
/* Copy ITCM RAM */
|
||||
__init_section(&__ld_load_itcm, &__ld_sitcm, &__ld_eitcm);
|
||||
/* Copy DTCM RAM */
|
||||
__init_section(&__ld_load_dtcm, &__ld_sdtcm, &__ld_edtcm);
|
||||
/* Copy .data section */
|
||||
__init_section(&__ld_load_data, &__ld_sdata, &__ld_edata);
|
||||
/* Fill bss with zero */
|
||||
__fill_zero(&__ld_sbss, &__ld_ebss);
|
||||
/* Fill Heap with zero */
|
||||
__fill_zero(&__ld_sheap, &__ld_eheap);
|
||||
/* Set clocks, waitstates, ART operation etc. */
|
||||
__system_init();
|
||||
|
||||
/* C++ init function */
|
||||
#if defined(__cplusplus)
|
||||
__libc_init_array();
|
||||
#endif
|
||||
/* Call main */
|
||||
main();
|
||||
|
||||
/* Catch return from main() */
|
||||
while(1);
|
||||
}
|
||||
|
||||
WEAK void __int_default_handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -27,12 +27,12 @@
|
|||
*/
|
||||
|
||||
/* USER PARAMETERS */
|
||||
__ld_stack_size = 0x400
|
||||
__ld_heap_size = 0x200
|
||||
__ld_stack_size = 0x2000;
|
||||
__ld_heap_size = 0x200;
|
||||
|
||||
/* END OF USER PARAMETERS */
|
||||
ENTRY(reset_handler)
|
||||
__ld_top_of_stack = 0x20050000 /* One byte above the end of the SRAM. Stack is pre-decrewmenting, so this is okay */
|
||||
ENTRY(Reset_Handler)
|
||||
__ld_top_of_stack = 0x20050000; /* One byte above the end of the SRAM. Stack is pre-decrewmenting, so this is okay */
|
||||
|
||||
|
||||
|
||||
|
|
@ -126,7 +126,7 @@ SECTIONS
|
|||
*(.dtcm)
|
||||
*(.dtcm*)
|
||||
. = ALIGN(4);
|
||||
__ld_edtcm = .
|
||||
__ld_edtcm = .;
|
||||
} >DTCMRAM AT> AXIFLASH
|
||||
|
||||
/* Initialized Data */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* syscalls.c
|
||||
*
|
||||
* Created on: Dec 14, 2014
|
||||
* Author: Mario Huettel <mario.huettel@gmx.net>
|
||||
*/
|
||||
|
||||
extern char __ld_sheap; // Defined by the linker
|
||||
extern char __ld_eheap;
|
||||
char* _sbrk(int incr) {
|
||||
|
||||
static char *heap_end;
|
||||
char *prev_heap_end;
|
||||
|
||||
if (heap_end == 0) {
|
||||
heap_end = &__ld_sheap;
|
||||
}
|
||||
prev_heap_end = heap_end;
|
||||
if (heap_end + incr > &__ld_eheap) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
heap_end += incr;
|
||||
return (char*) prev_heap_end;
|
||||
}
|
||||
int _isatty(int fd) {
|
||||
return 1;
|
||||
}
|
||||
int _close(int fd) {
|
||||
return 0;
|
||||
}
|
||||
int _open(int fd) {
|
||||
return 0;
|
||||
}
|
||||
int _fstat(void) {
|
||||
return 0;
|
||||
}
|
||||
int _lseek(void) {
|
||||
return 0;
|
||||
}
|
||||
int _read(void) {
|
||||
return 0;
|
||||
}
|
||||
int _write(int fd, const void *buf, int count) {
|
||||
//sendString((char*)buf, count);
|
||||
return count;
|
||||
}
|
||||
Loading…
Reference in New Issue