pcb
/
adc-dac-eval
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

FPGA SUPPLY, changed supply nets to global nets

This commit is contained in:
Mario Hüttel 2018-06-11 17:21:37 +02:00
parent 72f11eafff
commit 4d6b7db024
8 changed files with 1964 additions and 123 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
AD1974-ADC.sch
View File

@ -15,7 +15,7 @@ Comment3 ""
Comment4 ""
$EndDescr
$Comp
L shimatta_adc:AD1974 U?
L adc-dac-rescue:AD1974-shimatta_adc U?
U 1 1 5B68D566
P 5100 5900
F 0 "U?" H 5800 10687 60 0000 C CNN
@ -296,8 +296,6 @@ NoConn ~ 4900 3300
NoConn ~ 4900 3400
Wire Wire Line
6700 5000 6800 5000
Text HLabel 7500 5000 2 50 Input ~ 0
3V3
$Comp
L Device:C C?
U 1 1 5B22BC43
@ -474,8 +472,6 @@ Wire Wire Line
Connection ~ 1600 5650
Wire Wire Line
1600 5650 1400 5650
Text HLabel 1100 5650 0 50 Input ~ 0
3V3ANALOG
Wire Wire Line
4800 5650 4800 6050
Wire Wire Line
@ -572,4 +568,30 @@ Wire Wire Line
8450 2400 8900 2400
Text Label 8900 2400 2 50 ~ 0
CM
Wire Wire Line
1100 5650 850 5650
Wire Wire Line
850 5650 850 5550
$Comp
L power:+3V3 #PWR?
U 1 1 5B42D590
P 7500 5000
F 0 "#PWR?" H 7500 4850 50 0001 C CNN
F 1 "+3V3" H 7515 5173 50 0000 C CNN
F 2 "" H 7500 5000 50 0001 C CNN
F 3 "" H 7500 5000 50 0001 C CNN
1 7500 5000
1 0 0 -1
$EndComp
$Comp
L power:+3.3VA #PWR?
U 1 1 5B42D980
P 850 5550
F 0 "#PWR?" H 850 5400 50 0001 C CNN
F 1 "+3.3VA" H 865 5723 50 0000 C CNN
F 2 "" H 850 5550 50 0001 C CNN
F 3 "" H 850 5550 50 0001 C CNN
1 850 5550
1 0 0 -1
$EndComp
$EndSCHEMATC

60
ADAU1966-DAC.sch
View File

@ -841,12 +841,6 @@ Connection ~ 5750 6300
Wire Wire Line
6150 6300 6150 6200
Connection ~ 6150 6300
Text HLabel 650 600 0 50 Input ~ 0
5V
Text Label 1050 600 2 50 ~ 0
5VDAC
Text Label 6150 6150 0 50 ~ 0
5VDAC
Wire Wire Line
6250 6850 6250 7000
Wire Wire Line
@ -1125,8 +1119,6 @@ Text Label 2800 600 2 50 ~ 0
AVDD
Wire Wire Line
7850 5450 8350 5450
Text Label 7850 5450 0 50 ~ 0
5VDAC
Text Label 1800 5300 0 50 ~ 0
DVDD
$Comp
@ -1347,8 +1339,6 @@ Wire Wire Line
Connection ~ 1400 6650
Wire Wire Line
1400 6650 1650 6650
Text HLabel 850 6150 0 50 Input ~ 0
IOVDD
$Comp
L Device:C C?
U 1 1 5B5D3567
@ -1468,8 +1458,54 @@ Wire Wire Line
Connection ~ 4350 2800
Wire Wire Line
2750 3150 900 3150
Wire Bus Line
2200 3700 2200 4400
Text HLabel 900 3150 0 50 Input ~ 0
MCLK
$Comp
L power:+5V #PWR?
U 1 1 5B40A79B
P 6150 6150
F 0 "#PWR?" H 6150 6000 50 0001 C CNN
F 1 "+5V" H 6165 6323 50 0000 C CNN
F 2 "" H 6150 6150 50 0001 C CNN
F 3 "" H 6150 6150 50 0001 C CNN
1 6150 6150
1 0 0 -1
$EndComp
$Comp
L power:+3V3 #PWR?
U 1 1 5B40ABF2
P 850 6100
F 0 "#PWR?" H 850 5950 50 0001 C CNN
F 1 "+3V3" H 865 6273 50 0000 C CNN
F 2 "" H 850 6100 50 0001 C CNN
F 3 "" H 850 6100 50 0001 C CNN
1 850 6100
1 0 0 -1
$EndComp
Wire Wire Line
850 6100 850 6150
Wire Bus Line
2200 3700 2200 4400
$Comp
L power:+5VA #PWR?
U 1 1 5B42E061
P 650 600
F 0 "#PWR?" H 650 450 50 0001 C CNN
F 1 "+5VA" H 665 773 50 0000 C CNN
F 2 "" H 650 600 50 0001 C CNN
F 3 "" H 650 600 50 0001 C CNN
1 650 600
1 0 0 -1
$EndComp
$Comp
L power:+5VA #PWR?
U 1 1 5B42E559
P 7850 5450
F 0 "#PWR?" H 7850 5300 50 0001 C CNN
F 1 "+5VA" H 7865 5623 50 0000 C CNN
F 2 "" H 7850 5450 50 0001 C CNN
F 3 "" H 7850 5450 50 0001 C CNN
1 7850 5450
1 0 0 -1
$EndComp
$EndSCHEMATC

163
adc-dac-cache.lib
View File

@ -190,24 +190,11 @@ X VDDQ 9 100 1300 150 D 40 40 1 1 W
ENDDRAW
ENDDEF
#
# power:GND
# adc-dac-rescue:AD1974-shimatta_adc
#
DEF power:GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power:GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# shimatta_adc:AD1974
#
DEF shimatta_adc:AD1974 U 0 40 Y Y 1 F N
DEF adc-dac-rescue:AD1974-shimatta_adc U 0 40 Y Y 1 F N
F0 "U" 1300 4650 60 H V C CNN
F1 "shimatta_adc:AD1974" 200 4650 60 H V C CNN
F1 "adc-dac-rescue:AD1974-shimatta_adc" 200 4650 60 H V C CNN
F2 "" 450 3300 60 H V C CNN
F3 "" 450 3300 60 H V C CNN
DRAW
@ -280,6 +267,110 @@ X 9 9 1600 2950 200 L 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# power:+1V2
#
DEF power:+1V2 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power:+1V2" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +1V2 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power:+2V5
#
DEF power:+2V5 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power:+2V5" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +2V5 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power:+3.3VA
#
DEF power:+3.3VA #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power:+3.3VA" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power:+3V3
#
DEF power:+3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power:+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power:+5V
#
DEF power:+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power:+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power:+5VA
#
DEF power:+5VA #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power:+5VA" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5VA 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power:GND
#
DEF power:GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power:GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# shimatta_altera:EP4CE6E22C8N
#
DEF shimatta_altera:EP4CE6E22C8N U 0 40 Y Y 10 L N
@ -287,13 +378,14 @@ F0 "U" 100 -100 60 H V C CNN
F1 "shimatta_altera:EP4CE6E22C8N" 600 -100 60 H V C CNN
F2 "" 0 -50 60 H V C CNN
F3 "" 0 -50 60 H V C CNN
ALIAS EP4CE22E22C8N
DRAW
S 0 1700 950 0 1 1 0 f
S 0 1000 1000 0 2 1 0 f
S 0 1000 1200 0 2 1 0 f
S 0 800 1000 0 3 1 0 f
S 0 1100 1200 0 4 1 0 f
S 0 1400 1000 0 5 1 0 f
S 0 1300 850 0 6 1 0 f
S 0 1400 1100 0 5 1 0 f
S 0 1300 1050 0 6 1 0 f
S 0 1000 1200 0 7 1 0 f
S 0 1300 1100 0 8 1 0 f
S 0 1200 1200 0 9 1 0 f
@ -308,6 +400,7 @@ X GND 123 1150 750 200 L 50 50 1 1 W
X GND 131 1150 650 200 L 50 50 1 1 W
X VCCINT 134 -200 950 200 R 50 50 1 1 W
X GND 140 1150 550 200 L 50 50 1 1 W
X GND-PAD 145 -200 800 200 R 50 50 1 1 W
X GND 19 1150 1650 200 L 50 50 1 1 W
X GND 22 1150 350 200 L 50 50 1 1 W
X GND 27 1150 1550 200 L 50 50 1 1 W
@ -327,14 +420,14 @@ X VCCINT 78 -200 1250 200 R 50 50 1 1 W
X GND 79 1150 250 200 L 50 50 1 1 W
X GND 82 1150 1050 200 L 50 50 1 1 W
X GND 95 1150 950 200 L 50 50 1 1 W
X B1_IO 1 -200 950 200 R 50 50 2 1 B
X B1_IO-22VCCD_PLL3 1 -200 950 200 R 50 50 2 1 B
X B1_L4p 10 -200 350 200 R 50 50 2 1 B
X B1_L4n 11 -200 250 200 R 50 50 2 1 B
X B1_DATA0 13 -200 150 200 R 50 50 2 1 B
X VCCIO1 17 1200 950 200 L 50 50 2 1 W
X B1_IO 2 -200 850 200 R 50 50 2 1 B
X VCCIO1 17 1400 950 200 L 50 50 2 1 W
X B1_IO-22GNDA3 2 -200 850 200 R 50 50 2 1 B
X B1_CLK1_DIFFCLK_0n 23 -200 50 200 R 50 50 2 1 B
X B1_IO 3 -200 750 200 R 50 50 2 1 B
X B1_IO-22VCCA3 3 -200 750 200 R 50 50 2 1 B
X B1_L1n_ASDO 6 -200 650 200 R 50 50 2 1 W
X B1_VREFB1N0 7 -200 550 200 R 50 50 2 1 B
X B1_L2p_nCSO 8 -200 450 200 R 50 50 2 1 B
@ -346,8 +439,8 @@ X B2_DIFFIO_L8p 30 -200 450 200 R 50 50 3 1 B
X B2_VREFB2N0 31 -200 350 200 R 50 50 3 1 B
X B2_RUP1 32 -200 250 200 R 50 50 3 1 B
X B2_RDN1 33 -200 150 200 R 50 50 3 1 B
X B2_IO 34 -200 50 200 R 50 50 3 1 B
X B3_DIFFIO_B1p 38 -200 1050 200 R 50 50 4 1 B
X B2_IO-22VCCINT 34 -200 50 200 R 50 50 3 1 B
X B3_DIFFIO_B1p-22VCCINT 38 -200 1050 200 R 50 50 4 1 B
X B3_DIFFIO_B1n 39 -200 950 200 R 50 50 4 1 B
X VCCIO3 40 1400 1050 200 L 50 50 4 1 W
X B3_IO 42 -200 850 200 R 50 50 4 1 B
@ -362,29 +455,29 @@ X B3_DIFFIO_B11p 52 -200 150 200 R 50 50 4 1 B
X B3_DIFFIO_B11n 53 -200 50 200 R 50 50 4 1 B
X B4_DIFFIO_B12p 54 -200 1350 200 R 50 50 5 1 B
X B4_DIFFIO_B12n 55 -200 1250 200 R 50 50 5 1 B
X VCCIO4 56 1200 1350 200 L 50 50 5 1 W
X VCCIO4 56 1300 1350 200 L 50 50 5 1 W
X B4_DIFFIO_B15p 58 -200 1150 200 R 50 50 5 1 B
X B4_DIFFIO_B16p 59 -200 1050 200 R 50 50 5 1 B
X B4_DIFFIO_B16n 60 -200 950 200 R 50 50 5 1 B
X VCCIO4 62 1200 1250 200 L 50 50 5 1 W
X VCCIO4 62 1300 1250 200 L 50 50 5 1 W
X B4_IO 64 -200 850 200 R 50 50 5 1 B
X B4_VREFB4N0 65 -200 750 200 R 50 50 5 1 B
X B4_RUP2 66 -200 650 200 R 50 50 5 1 B
X B4_RDN2 67 -200 550 200 R 50 50 5 1 B
X B4_DIFFIO_B20n 68 -200 450 200 R 50 50 5 1 B
X B4_IO 69 -200 350 200 R 50 50 5 1 B
X B4_DIFFIO_B21p 70 -200 250 200 R 50 50 5 1 B
X B4_DIFFIO_B21p-22VCCINT 70 -200 250 200 R 50 50 5 1 B
X B4_DIFFIO_B21n 71 -200 150 200 R 50 50 5 1 B
X B4_DIFFIO_B22p 72 -200 50 200 R 50 50 5 1 B
X B5_IO 73 -200 1250 200 R 50 50 6 1 B
X B5_IO 74 -200 1150 200 R 50 50 6 1 B
X B5_IO 75 -200 1050 200 R 50 50 6 1 B
X B5_IO-VCCD_PLL4 73 -200 1250 200 R 50 50 6 1 B
X B5_IO-22GNDA4 74 -200 1150 200 R 50 50 6 1 B
X B5_IO-22VCCA4 75 -200 1050 200 R 50 50 6 1 B
X B5_RUP3 76 -200 950 200 R 50 50 6 1 B
X B5_RDN3 77 -200 850 200 R 50 50 6 1 B
X B5_VREFB5N0 80 -200 750 200 R 50 50 6 1 B
X VCCIO5 81 1050 1250 200 L 50 50 6 1 W
X VCCIO5 81 1250 1250 200 L 50 50 6 1 W
X B5_IO 83 -200 650 200 R 50 50 6 1 B
X B5_DIFFIO_R8n 84 -200 550 200 R 50 50 6 1 B
X B5_DIFFIO_R8n-22VCCINT 84 -200 550 200 R 50 50 6 1 B
X B5_DIFFIO_R8p 85 -200 450 200 R 50 50 6 1 B
X B5_DIFFIO_R7n 86 -200 350 200 R 50 50 6 1 B
X B5_DIFFIO_R7p 87 -200 250 200 R 50 50 6 1 B
@ -412,7 +505,7 @@ X B7_VREFB7N0 119 -200 650 200 R 50 50 8 1 B
X B7_DIFFIO_T16n 120 -200 550 200 R 50 50 8 1 B
X B7_DIFFIO_T16p 121 -200 450 200 R 50 50 8 1 B
X VCCIO7 122 1300 1150 200 L 50 50 8 1 W
X B7_DIFFIO_T13p 124 -200 350 200 R 50 50 8 1 B
X B7_DIFFIO_T13p-22VCCINT 124 -200 350 200 R 50 50 8 1 B
X B7_IO 125 -200 250 200 R 50 50 8 1 B
X B7_DIFFIO_T12n 126 -200 150 200 R 50 50 8 1 B
X B7_DIFFIO_T12p 127 -200 50 200 R 50 50 8 1 B
@ -424,7 +517,7 @@ X B8_DIFFIO_T10p_DATA3 133 -200 850 200 R 50 50 9 1 B
X B8_DIFFIO_T8n 135 -200 750 200 R 50 50 9 1 B
X B8_VREFB8N0 136 -200 650 200 R 50 50 9 1 B
X B8_IO_DATA5 137 -200 550 200 R 50 50 9 1 B
X B8_IO_DATA6 138 -200 450 200 R 50 50 9 1 B
X B8_IO_DATA6-22VCCINT 138 -200 450 200 R 50 50 9 1 B
X VCCIO8 139 1400 1050 200 L 50 50 9 1 W
X B8_DIFFIO_T5p 141 -200 350 200 R 50 50 9 1 B
X B8_DIFFIO_T2p 142 -200 250 200 R 50 50 9 1 B

3
adc-dac-rescue.dcm Normal file
View File

@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

81
adc-dac-rescue.lib Normal file
View File

@ -0,0 +1,81 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# AD1974-shimatta_adc
#
DEF AD1974-shimatta_adc U 0 40 Y Y 1 F N
F0 "U" 1300 4650 60 H V C CNN
F1 "AD1974-shimatta_adc" 200 4650 60 H V C CNN
F2 "" 450 3300 60 H V C CNN
F3 "" 450 3300 60 H V C CNN
DRAW
T 900 950 3750 60 0 0 0 "Analog Input" Normal 0 C C
T 900 400 600 60 0 0 0 "Analog Supply" Normal 0 C C
T 900 500 2650 60 0 0 0 "Aux. Data" Normal 0 C C
T 900 450 4150 60 0 0 0 Control Normal 0 C C
T 900 450 3100 60 0 0 0 Data Normal 0 C C
T 900 1050 600 60 0 0 0 "Digital Supply" Normal 0 C C
T 900 350 1900 60 0 0 0 Filter Normal 0 C C
T 900 550 3750 60 0 1 0 Clock Normal 0 C C
S 0 0 1400 4600 0 1 0 f
P 2 0 1 0 1400 3450 1350 3450 N
P 3 0 1 0 0 1250 350 1250 350 0 N
P 3 0 1 0 0 4000 400 4000 400 4600 N
P 3 0 1 0 1000 4600 1000 3450 1350 3450 N
P 3 0 1 0 1400 1250 1100 1250 1100 0 N
P 4 0 1 0 0 2100 300 2100 300 1800 0 1800 N
P 4 0 1 0 0 2850 450 2850 450 2450 0 2450 N
P 4 0 1 0 0 3400 400 3400 400 3000 0 3000 N
P 4 0 1 0 0 3900 500 3900 500 3650 0 3650 N
X AGND 1 -200 650 200 R 50 50 1 1 W
X PD/RST 10 -200 4500 200 R 50 50 1 1 I I
X 11 11 1600 2850 200 L 50 50 1 1 N N
X DGND 12 1600 350 200 L 50 50 1 1 W
X DVDD 13 1600 900 200 L 50 50 1 1 W
X AUXDATA2 14 -200 2500 200 R 50 50 1 1 B
X AUXDATA1 15 -200 2600 200 R 50 50 1 1 B
X 16 16 1600 2300 200 L 50 50 1 1 N N
X AUXBCLK 17 -200 2700 200 R 50 50 1 1 B C
X AUXLRCLK 18 -200 2800 200 R 50 50 1 1 B C
X ASDATA2 19 -200 3050 200 R 50 50 1 1 B
X MCLKI/XI 2 -200 3850 200 R 50 50 1 1 I C
X ASDATA1 20 -200 3150 200 R 50 50 1 1 O
X ABCLK 21 -200 3250 200 R 50 50 1 1 B C
X ALRCLK 22 -200 3350 200 R 50 50 1 1 B C
X CIN 23 -200 4350 200 R 50 50 1 1 I
X COUT 24 -200 4250 200 R 50 50 1 1 B
X DGND 25 1600 250 200 L 50 50 1 1 W
X CCLK 26 -200 4150 200 R 50 50 1 1 I C
X ~CLATCH 27 -200 4050 200 R 50 50 1 1 I
X 28 28 1600 2700 200 L 50 50 1 1 N N
X 29 29 1600 2600 200 L 50 50 1 1 N N
X MCLKO/XO 3 -200 3700 200 R 50 50 1 1 O C
X 30 30 1600 2500 200 L 50 50 1 1 N N
X 31 31 1600 2400 200 L 50 50 1 1 N N
X AGND 32 -200 450 200 R 50 50 1 1 W
X AVDD 33 -200 1100 200 R 50 50 1 1 W
X AGND 34 -200 350 200 R 50 50 1 1 W
X FILTR 35 -200 1950 200 R 50 50 1 1 O
X AGND 36 -200 250 200 R 50 50 1 1 W
X AVDD 37 -200 1000 200 R 50 50 1 1 W
X CM 38 -200 2050 200 R 50 50 1 1 w
X ADC1LP 39 1600 4500 200 L 50 50 1 1 I
X AGND 4 -200 550 200 R 50 50 1 1 W
X ADC1LN 40 1600 4400 200 L 50 50 1 1 I
X ADC1RP 41 1600 4200 200 L 50 50 1 1 I
X ADC1RN 42 1600 4100 200 L 50 50 1 1 I
X ADC2LP 43 1600 3900 200 L 50 50 1 1 I
X ADC2LN 44 1600 3800 200 L 50 50 1 1 I
X ADC2RP 45 1600 3600 200 L 50 50 1 1 I
X ADC2RN 46 1600 3500 200 L 50 50 1 1 I
X LF 47 -200 1850 200 R 50 50 1 1 I
X AVDD 48 -200 900 200 R 50 50 1 1 I
X AVDD 5 -200 1200 200 R 50 50 1 1 W
X 6 6 1600 3250 200 L 50 50 1 1 N N
X 7 7 1600 3150 200 L 50 50 1 1 N N
X 8 8 1600 3050 200 L 50 50 1 1 N N
X 9 9 1600 2950 200 L 50 50 1 1 N N
ENDDRAW
ENDDEF
#
#End Library

6
adc-dac.sch
View File

@ -27,10 +27,8 @@ F6 "~CLATCH" I R 1850 1550 50
F7 "CCLK" I R 1850 1450 50
F8 "COUT" I R 1850 1350 50
F9 "CDATA" I R 1850 1250 50
F10 "5V" I R 1850 1000 50
F11 "PU~RST" I R 1850 1150 50
F12 "IOVDD" I R 1850 900 50
F13 "MCLK" I R 1850 1700 50
F10 "PU~RST" I R 1850 1150 50
F11 "MCLK" I R 1850 1700 50
$EndSheet
Text Label 2000 750 0 50 ~ 0
DAT[1..8]

1741
fpga.sch
View File

File diff suppressed because it is too large Load Diff

1
sym-lib-table
View File

@ -2,4 +2,5 @@
(lib (name shimatta_analog)(type Legacy)(uri ${SHIMATTA_DIR}/schematics/shimatta_analog.lib)(options "")(descr ""))
(lib (name shimatta_adc)(type Legacy)(uri ${SHIMATTA_DIR}/schematics/shimatta_adc.lib)(options "")(descr ""))
(lib (name shimatta_altera)(type Legacy)(uri ${SHIMATTA_DIR}/schematics/shimatta_altera.lib)(options "")(descr ""))
(lib (name adc-dac-rescue)(type Legacy)(uri ${KIPRJMOD}/adc-dac-rescue.lib)(options "")(descr ""))
)