.gitignore
|
add project files
|
2018-06-09 13:11:37 +02:00 |
AD1974-ADC.sch
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |
ADAU1966-DAC.sch
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |
adc-dac-cache.lib
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |
adc-dac.kicad_pcb
|
add project files
|
2018-06-09 13:11:37 +02:00 |
adc-dac.pro
|
add project files
|
2018-06-09 13:11:37 +02:00 |
adc-dac.sch
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |
fpga.sch
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |
input-amps.sch
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |
LICENSE
|
Initial commit
|
2018-06-09 13:00:38 +02:00 |
output-amps.sch
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |
README.md
|
Initial commit
|
2018-06-09 13:00:38 +02:00 |
sym-lib-table
|
ADC finished, FPGA+SDRAM
|
2018-06-10 14:20:15 +02:00 |